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OPA2316 Datasheet, PDF (18/46 Pages) Texas Instruments – OPAx316 10-MHz, Low-Power, Low-Noise, RRIO, 1.8-V CMOS Operational Amplifier
OPA316, OPA2316, OPA2316S, OPA4316
SBOS703D – APRIL 2014 – REVISED DECEMBER 2014
www.ti.com
Feature Description (continued)
7.3.7 Capacitive Load and Stability
The OPA316 is designed to be used in applications where driving a capacitive load is required. As with all
operational amplifiers, there may be specific instances where the OPA316 can become unstable. The particular
operational amplifier circuit configuration, layout, gain, and output loading are some of the factors to consider
when establishing whether or not an amplifier is stable in operation. An operational amplifier in the unity-gain
(+1 V/V) buffer configuration that drives a capacitive load exhibits a greater tendency to be unstable than an
amplifier operated at a higher noise gain. The capacitive load, in conjunction with the operational amplifier output
resistance, creates a pole within the feedback loop that degrades the phase margin. The degradation of the
phase margin increases as the capacitive loading increases. As a conservative best practice, designing for 25%
overshoot (40° phase margin) provides improved stability over process variations. The equivalent series
resistance (ESR) of some very-large capacitors (CL greater than 1 μF) is sufficient to alter the phase
characteristics in the feedback loop such that the amplifier remains stable. Increasing the amplifier closed-loop
gain allows the amplifier to drive increasingly larger capacitance. This increased capability is evident when
observing the overshoot response of the amplifier at higher voltage gains. See the typical characteristic graphs,
Small-Signal Overshoot vs Capacitive Load (Figure 24, G = –1 V/V) and Small-Signal Overshoot vs Capacitive
Load (Figure 25, G = +1 V/V).
One technique for increasing the capacitive load drive capability of the amplifier operating in a unity-gain
configuration is to insert a small resistor (typically 10 Ω to 20 Ω) in series with the output, as shown in Figure 38.
This resistor significantly reduces the overshoot and ringing associated with large capacitive loads. One possible
problem with this technique, however, is that a voltage divider is created with the added series resistor and any
resistor connected in parallel with the capacitive load. The voltage divider introduces a gain error at the output
that reduces the output swing.
V+
RS
Device
VOUT
VIN
10 W to
20 W
RL
CL
Figure 38. Improving Capacitive Load Drive
7.3.8 Overload Recovery
Overload recovery is defined as the time required for the operational amplifier output to recover from a saturated
state to a linear state. The output devices of the operational amplifier enter a saturation region when the output
voltage exceeds the rated operating voltage, either because of the high input voltage or the high gain. After the
device enters the saturation region, the charge carriers in the output devices require time to return back to the
linear state. After the charge carriers return back to the linear state, the device begins to slew at the specified
slew rate. Thus, the propagation delay in case of an overload condition is the sum of the overload recovery time
and the slew time. The overload recovery time for the OPA316 is approximately 300 ns.
7.3.9 DFN Package
The OPA2316 (dual version) uses the DFN style package (also known as SON); this package is a QFN with
contacts on only two sides of the package bottom. This leadless package maximizes printed circuit board (PCB)
space and offers enhanced thermal and electrical characteristics through an exposed pad. One of the primary
advantages of the DFN package is its low, 0.9-mm height. DFN packages are physically small, have a smaller
routing area, improved thermal performance, reduced electrical parasitics, and use a pinout scheme that is
consistent with other commonly-used packages (such as SOIC and MSOP). Additionally, the absence of external
leads eliminates bent-lead issues.
The DFN package can be easily mounted using standard PCB assembly techniques. See application notes,
QFN/SON PCB Attachment (SLUA271), and Quad Flatpack No-Lead Logic Packages (SCBA017), both available
for download from www.ti.com.
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