TL494_15 Datasheet, PDF (17/33 Pages) Unisonic Technologies – VOLTAGE MODE PWM CONTROL CIRCUIT

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Typical Application (continued)
10.2.2.3 Inductor Calculations
The switching circuit used is shown in Figure 39.
L
S1
V_I
D1
TL494
SLVS074G – JANUARY 1983 – REVISED JANUARY 2015
C1
R1
V_O
Figure 14. Switching Circuit
The size of the inductor (L) required is:
d
= duty cycle = V_O/V_I = 5 V/32 V = 0.156
f
= 20 kHz (design objective)
t_on = time on (S1 closed) = (1/f) × d = 7.8 μs
t_off = time off (S1 open) = (1/f) – ton = 42.2 μs
L
≉ (V_I – V_O ) × t_on/ΔI_L
≉ [(32 V – 5 V) × 7.8 μs]/1.5 A
≉ 140.4 μH
10.2.2.4 Output Capacitance Calculations
Once the filter inductor has been calculated, the value of the output filter capacitor is calculated to meet the
output ripple requirements. An electrolytic capacitor can be modeled as a series connection of an inductance, a
resistance, and a capacitance. To provide good filtering, the ripple frequency must be far below the frequencies
at which the series inductance becomes important. So, the two components of interest are the capacitance and
the effective series resistance (ESR). The maximum ESR is calculated according to the relation between the
specified peak-to-peak ripple voltage and the peak-to-peak ripple current.
ESR(max) = ^DVO(ripple) = ^V » 0.067 W
DI_L
1.5 A
(14)
The minimum capacitance of C3 necessary to maintain the V_O ripple voltage at less than the 100-mV design
objective is calculated according to Equation 15:
C3 =
DI_L
8f DV_O
=
1.5 A
8 ´ 20 ´10³ ´ 0.1 V
= 94 mF
(15)
A 220-mF, 60-V capacitor is selected because it has a maximum ESR of 0.074 Ω and a maximum ripple current
of 2.8 A.
10.2.2.5 Transistor Power-Switch Calculations
The transistor power switch was constructed with an NTE153 pnp drive transistor and an NTE331 npn output
transistor. These two power devices were connected in a pnp hybrid Darlington circuit configuration (see
Figure 15).
Copyright © 1983–2015, Texas Instruments Incorporated
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