TLC876M Datasheet, PDF (16/23 Pages) Texas Instruments – 10-BIT 20 MSPS PARALLEL OUTPUT CMOS ANALOG-TO-DIGITAL CONVERTERS

TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140D – JULY 1997 – REVISED MAY 2000
PRINCIPLES OF OPERATION
dc considerations (continued)
REFTF
REFTS
REFBS
REFBF
5Ω
10 Ω
5Ω
5Ω
DAC
10 Ω
5Ω
5Ω
5Ω
TLC876
5Ω
CLK
RARRAY
500 Ω
CLK
5Ω
C (Equivalent)
Figure 17. TLC876 Equivalent Reference Structure
The REFTS and REFBS terminals should not be connected in configurations that do not use a force-sense
reference. Connecting the force and sense lines together allows current to flow in the sense lines. Any current
allowed to flow through these lines must be negligibly small. Current flow causes voltage drops across the
resistance in the sense lines. Because the internal DACs tap different points along the sense lines, each DAC
would receive a slightly different reference voltage if current were flowing in these lines. To avoid this undesirable
condition, leave the sense lines unconnected. Any current allowed to flow through these lines must be negligibly
small (< 100 µA).
The voltage drop across the internal resistor array (R_ARRAY) determines the input span. The nominal differential
voltage is 2 V_pp. The full-scale input span is given by equation 3.
Input Voltage Span = V(REFTS) – V(REFBS)
(3)
Therefore, a full-scale input span is approximately 2 V when [V(REFTS) – V(REFBS)] = 2 V. The external
reference must provide approximately 4 mA for a 2-V drop across the internal resistor array.
Figure 18 shows the flexibility in determining both the full-scale span of the analog input and where to center
this voltage without degrading the typical performance.
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