LP38853_15 Datasheet, PDF (15/28 Pages) Texas Instruments – LP38853 3A Fast-Response High-Accuracy Adjustable LDO Linear Regulator with Enable and Soft-Start

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LP38853
SNVS335D – DECEMBER 2006 – REVISED APRIL 2013
Figure 32. Typical C_SS vs C_OUT Values
The C_SS capacitor must be connected to a clean ground path back to the device ground pin. No components,
other than C_SS, should be connected to the SS pin, as there could be adverse effects to V_OUT.
If the Soft-Start function is not needed the SS pin should be left open, although some minimal capacitance value
is always recommended.
ENABLE OPERATION
The Enable pin (EN) provides a mechanism to enable, or disable, the regulator output stage. The Enable pin has
an internal pull-up, through a typical 180 kΩ resistor, to V_BIAS.
If the Enable pin is actively driven, pulling the Enable pin above the V_EN threshold of 1.25V (typical) will turn the
regulator output on, while pulling the Enable pin below the V_EN threshold will turn the regulator output off. There
is approximately 100 mV of hysteresis built into the Enable threshold provide noise immunity.
If the Enable function is not needed this pin should be left open, or connected directly to V_BIAS. If the Enable pin
is left open, stray capacitance on this pin must be minimized, otherwise the output turn-on will be delayed while
the stray capacitance is charged through the internal resistance (r_EN).
POWER DISSIPATION AND HEAT-SINKING
Additional copper area for heat-sinking may be required depending on the maximum device dissipation (P_D) and
the maximum anticipated ambient temperature (T_A) for the device. Under all possible conditions, the junction
temperature must be within the range specified under operating conditions.
The total power dissipation of the device is the sum of three different points of dissipation in the device.
The first part is the power that is dissipated in the NMOS pass element, and can be determined with the formula:
P_D(PASS) = (V_IN - V_OUT) × I_OUT
(8)
The second part is the power that is dissipated in the bias and control circuitry, and can be determined with the
formula:
P_D(BIAS) = V_BIAS × I_GND(BIAS)
where
• I_GND(BIAS) is the portion of the operating ground current of the device that is related to V_BIAS.
(9)
The third part is the power that is dissipated in portions of the output stage circuitry, and can be determined with
the formula:
P_D(IN) = V_IN × I_GND(IN)
where
• I_GND(IN) is the portion of the operating ground current of the device that is related to V_IN.
(10)
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