BQ24298_15 Datasheet, PDF (15/51 Pages) Texas Instruments – bq24298 I2C Controlled 3A Single Cell USB Charger With Narrow VDC Power Path Management and Adjustable Voltage USB OTG

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bq24298
SLUSC59 – APRIL 2015
8.3 Feature Description
8.3.1 Device Power Up
8.3.1.1 Power-On-Reset (POR)
The internal bias circuits are powered from the higher voltage of VBUS and BAT. When VBUS or VBAT rises
above UVLOZ, the sleep comparator, battery depletion comparator and BATFET driver are active. I²C interface
is ready for communication and all the registers are reset to default value. The host can access all the registers
after POR.
8.3.1.2 Power Up from Battery without DC Source
If only battery is present and the voltage is above depletion threshold (V_{BAT_DEPL}), the BATFET turns on and
connects battery to system. The REGN LDO stays off to minimize the quiescent current. The low R_DSON in
BATFET and the low quiescent current on BAT minimize the conduction loss and maximize the battery run time.
8.3.1.2.1 BATFET Turn Off
The BATFET can be forced off by the host through I²C REG07[5] with a typical 9 s delay. This bit allows the user
to independently turn off the BATFET when the battery condition becomes abnormal during charging. When
BATFET is off, there is no path to charge or discharge the battery. When battery is not attached, the BATFET
should be turned off by setting REG07[5] to 1 to disable charging and supplement mode.
8.3.1.2.2 Shipping Mode
To extend battery life and minimize power when system is powered off during system idle, shipping, or storage,
the device can turn off BATFET so that the system voltage is zero to minimize the leakage. The BATFET can be
turned off by setting REG07[5] (BATFET_DISABLE) bit.
In order to keep BATFET off during shipping mode, the host has to disable the watchdog timer (REG05[5:4] =
00) and disable BATFET (REG07[5] = 1) at the same time. Once the BATFET is disabled, one of the following
events can turn on BATFET and clear REG07[5] (BATFET_DISABLE) bit.
1. Plug in adapter
2. Write REG07[5] = 0
3. watchdog timer expiration
4. Register reset (REG01[7] = 1)
5. A logic high to low transition on QON pin with longer than t_{QON_ON_1} 0.6s to 1.5s typically deglitch turns on
BATFET and exit shipping mode.
8.3.1.2.3 BATFET System Reset
When QON is driven to logic low by at least t_{QON_RST} 12.5s typically while VBUS is not plugged in and
BATFET_DISABLE = 0, the BATFET is turned off for t_{BATFET_RST} which is usually between 250ms and 400ms.
The BATFET is re-enabled after t_{BATFET_RST} duration. This function allows systems connected to SYS to have
power-on-reset. This function can be disabled by setting BATFET_RST_EN bit to 0.
8.3.1.3 Power Up from DC Source
When the DC source plugs in, the charger device checks the input source voltage to turn on REGN LDO and all
the bias circuits. It also checks the input current limit before starts the buck converter.
8.3.1.3.1 REGN LDO
The REGN LDO supplies internal bias circuits as well as the HSFET and LSFET gate drive. The LDO also
provides bias rail to TS external resistors. The pull-up rail of STAT and PG (bq24298)can be connected to REGN
as well.
The REGN is enabled when all the conditions are valid.
1. VBUS above V_{VBUS_UVLOZ}
2. VBUS above V_BAT + V_SLEEPZ in buck mode or VBUS below V_BAT + V_SLEEP in boost mode
3. After typical 220-ms delay (100 ms minimum) is complete
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