BQ24130_15 Datasheet, PDF (15/29 Pages) Texas Instruments – 600-kHz Synchronous Switch-Mode Host-ControlledBattery/Supercapacitor Charger With 4-A Integrated MOSFETs

bq24130
www.ti.com
SLUSAN2C – JULY 2011 – REVISED JUNE 2012
Enable and Disable Charging
The following conditions have to be valid before charge is enabled:
• ISET1 pin above 120 mV
• The device is not in Under Voltage Lockout (UVLO) mode (i.e. V_(AVCC) > UVLO)
• The device is not in SLEEP mode (i.e. V_(AVCC) > V_(SRN))
• The AVCC voltage is lower than the AC over-voltage threshold (i.e. V_(AVCC) < V_(ACOV))
• 50 ms delay is complete after initial power-up
• The REGN and VREF LDO voltages are at the correct levels
• Thermal Shut down (T_SHUT) is not valid
• No T_S fault is detected
One of the following conditions will stop on-going charging:
• ISET1 pin voltage is below 40mV;
• The device is in UVLO mode;
• Adapter is removed, causing the device to enter SLEEP mode;
• AVCC voltage is over voltage
• The REGN or VREF LDO voltage is overloaded;
• T_SHUT temperature threshold is reached.
• T_S voltage goes out of range indicating the battery temperature is too hot or too cold
Automatic Internal Soft-Start Charger Current
The charger automatically soft-starts the charger regulation current every time the charger goes into fast-charge
to ensure there is no overshoot or stress on the output capacitors or the power converter. The soft-start consists
of stepping-up the charge regulation current into 8 evenly divided steps up to the programmed charge current.
Each step lasts around 1.6 ms, for a typical rise time of 12.8 ms. No external components are needed for this
function.
Converter Operation
The bq24130 employs a 600kHz constant-frequency step-down switching regulator. The fixed frequency
oscillator keeps tight control of the switching frequency under all conditions of input voltage, battery voltage,
charge current and temperature, simplifying output filter design and keeping it out of the audible noise region.
A type III compensation network allows using ceramic capacitors at the output of the converter. An internal saw-
tooth ramp is compared to the internal error control signals to vary the duty-cycle of the converter. The ramp
height is proportional to the AVCC voltage to cancel out any loop gain variation due to a change in input voltage,
and simplifies loop compensation. Internal gate drive logic allows achieving 97% duty cycle before pulse skipping
starts.
Charge Undercurrent Protection
When the voltage between BTST and SW falls below 4 V, the low-side FET turns on to provide refresh charge
up the bootstrap capacitor. After the recharge, if the SRP-SRN voltage decreases below 5 mV, the low side FET
will be turned off for the remainder of the switching cycle (i.e. non-synchronous operation). This is important to
prevent negative inductor current from causing any boost effect in which the input voltage increases as power is
transferred from the battery to the input capacitors. This can lead to an overvoltage on the AVCC node and
potentially cause damage to the system.
When the IC senses SRP-SRN average voltage drops below 1.25 mV (0.125 A of inductor current for a 10 mΩ
sense resistor) or the battery voltage is less than 2 V, the charger will enter non-synchronous mode and the low-
side n-channel power MOSFET will stay off and rely on the body diode to make converter as a standard buck.
This prevents the battery discharge current when battery is almost fully charged and current tapers down to a
lower level. The low-side n-channel power MOSFET will turn on when a bootstrap capacitor refresh pulse is
needed.
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