LP38500-ADJ Datasheet, PDF (14/23 Pages) National Semiconductor (TI) – 1.5A FlexCap Low Dropout Linear Regulator for 2.7V to 5.5V Inputs

LP38500-ADJ, LP38502-ADJ
SNVS539F – NOVEMBER 2007 – REVISED APRIL 2013
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Figure 26. θ_JA vs Copper Area for DDPAK/TO-263 Package
As shown in the figure, increasing the copper area beyond 1.5 square inch produces very little improvement.
HEATSINKING WSON PACKAGE
The junction-to-ambient thermal resistance for the WSON-8 package is dependent on how much PCB copper is
present to conduct heat away from the device. The LP38502SD-ADJ evaluation board (980600046-100) was
tested and gave a result of about 80°C/W with a power dissipation of 1W and no external airflow. This evaluation
board is a two layer board using two ounce copper, and the copper area on topside for heatsinking is
approximately two square inches. Multiple vias under the DAP also thermally connect to the backside layer which
has about three square inches of copper dedicated to heatsinking.
Finite modeling of the LP38502SD-ADJ with a four layer board (JEDEC JESD51-7 and JESD51-5) with one
thermal via directly under the DAP to the first copper plane predicts a θ_JA of 72°C/W.
With four thermal vias directly under the DAP to the first copper plane, the modeling predicts a θ_JA of 50°C/W.
Adding a dog-bone copper area with four additional thermal vias in the dog-bone area to the first copper plane
can improve θ_JA to 45C°C/W.
See Application Note AN-1520 A Guide to Board Layout for Best Thermal Resistance for Exposed Packages
(SNVA183) for additional thermal considerations for printed circuit board layouts.
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