BQ2013H Datasheet, PDF (14/24 Pages) Texas Instruments – Gas Gauge IC for Power- Assist Applications

bq2013H
tors are used. The time to change CR varies due to the
user-selectable count rates.
The overload flag (OVLD) is asserted when a discharge
overload is detected. PROG4 defines the overload
threshold, as defined in Table 4. OVLD remains as-
serted as long as the condition is valid.
The OVLD location is:
FLGS2 Bits
7
65
4
3
2
-
--
-
-
-
1
0
- OVLD
Where OVLD is:
0 If V_SRO > V_OVLD
1 If V_SRO < V_OVLD
Program Pin Pull-Down Register (PPD)
The PPD register (address=07h) contains some of the pro-
gramming pin information for the bq2013H. The program
pins have a corresponding PPD bit location, PPD_1–6. A
given location is set if a pull-down resistor has been de-
tected on its corresponding segment driver. For example, if
PROG₁ and PROG₄ have pull-down resistors, the con-
tents of PPD are xx001001.
PPD/PPU Bits
7
6
5
4
3
2
1
0
RSVD RSVD PPU6 PPU₅ PPU4 PPU3 PPU2 PPU1
RSVD RSVD PPD6 PPD₅ PPD4 PPD3 PPD2 PPD1
Program Pin Pull-Up Register (PPU)
The PPU register (address=08h) contains the rest of the
programming pin information for the bq2013H. The pro-
gram pins have a corresponding PPU bit location, PPU_1–6.
A given location is set if a pull-up resistor has been de-
tected on its corresponding segment driver. For example, if
PROG₃ and PROG₅ have pull-up resistors, the contents of
PPU are xx010100.
Output Control Register (OCTL)
The write-only OCTL register (address=0ah) provides the
system with a means to check the display connections for
the bq2013H. The segment drivers may be overwritten by
data from OCTL when bit 1 of OCTL, OCE, is set. The
data in bits OC_5–1 of the OCTL register (see Table 9 for de-
tails) is output onto the segment pins, SEG_5–1, respectively
if OCE=1. Whenever OCE is written to 1, the MSB of
OCTL should be set to a 1. The OCE register location
must be cleared to return the bq2013H to normal opera-
tion. OCE may be cleared by either writing the bit to a
logic zero via the serial port or by resetting the bq2013H.
Offset Adjustment Register
The value in this register (address = 0bh) is used to cor-
rect NAC for the offset of the VFC. This register is ini-
tialized from the state of PROG₆. The following are the
initial values:
I 0 = no offset correction
I 46 = -75µV correction
I 23 = -150µV correcton
The value is set by the equation:
Offset = ¹
289 ∗ VCOS
where V_COS is the desired offset correction in volts.
Self-Discharge Rate Compensation
This register contains the value used to correct for the
self-discharge compensation. This value is initialized
from the state of PROG₃. The following are the initial
values:
I 235 = 1.6% per day ^{} ₆₁₄^{}
I
214
=
0.8%
per
day

1
128

I 88 = 0.2% per day ^{} ₅₁₁₂^{}
The value is set by the equation:
SDR
=
256
−

0.3296
CSD

where C_SD is the self-discharge rate per day.
Digital Magnitude Filter (DMF)
The read-write DMF register (address=0dh) provides
the system with a means to change the default settings
of the digital magnitude filter. By writing different val-
ues into this register, the limits of V_SRD and V_SRQ can be
adjusted. The default value for the DMF is 250µV. The
value is set by the equation:
DMF = ⁴⁵
VSRD, Q
where V_SRD,Q is the desired filter threshold in mV.
Note: Care should be taken when writing to this regis-
ter. A V_SRD and V_SRQ below the specified V_OS may ad-
versely affect the accuracy of the bq2013H.
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