TMS320C5505 Datasheet, PDF (127/142 Pages) Texas Instruments – TMS320C5505 Fixed-Point Digital Signal Processor

TMS320C5505
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SPRS660 – JANUARY 2010
CPU WORD
ADDRESS
850Dh
850Eh
8511h
8512h
8515h
8516h
8519h
851Ah
851Dh
851Eh
8521h
8522h
8525h
8526h
8529h
852Ah
852Dh
852Eh
8531h
8532h
8535h
8536h
8539h
853Ah
853Dh
853Eh
8541h
8542h
8545h
8546h
8549h
854Ah
854Dh
854Eh
9000h
9001h
9004h
9008h
9800h
9801h
9808h
Table 5-45. Universal Serial Bus (USB) Registers ⁽¹⁾ (continued)
ACRONYM
REGISTER DESCRIPTION
-
Reserved
CONFIGDATA
(Upper byte of 850Eh)
Returns details of core configuration.
Control and Status Register for Endpoint 1
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
PERI_TXCSR
Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
PERI_RXCSR
Control Status Register for Peripheral Receive Endpoint (peripheral mode)
RXCOUNT
Number of Bytes in the Receiving Endpoint's FIFO
-
Reserved
-
Reserved
-
Reserved
Control and Status Register for Endpoint 2
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
PERI_TXCSR
Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
PERI_RXCSR
Control Status Register for Peripheral Receive Endpoint (peripheral mode)
RXCOUNT
Number of Bytes in Host Receive endpoint FIFO
-
Reserved
-
Reserved
-
Reserved
Control and Status Register for Endpoint 3
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
PERI_TXCSR
Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
PERI_RXCSR
Control Status Register for Peripheral Receive Endpoint (peripheral mode)
RXCOUNT
Number of Bytes in Host Receive endpoint FIFO
-
Reserved
-
Reserved
-
Reserved
Control and Status Register for Endpoint 4
TXMAXP
Maximum Packet Size for Peripheral/Host Transmit Endpoint
PERI_TXCSR
Control Status Register for Peripheral Transmit Endpoint (peripheral mode)
RXMAXP
Maximum Packet Size for Peripheral/Host Receive Endpoint
PERI_RXCSR
Control Status Register for Peripheral Receive Endpoint (peripheral mode)
RXCOUNT
Number of Bytes in Host Receive endpoint FIFO
-
Reserved
-
Reserved
-
Reserved
CPPI DMA (CMDA) Registers
-
Reserved
-
Reserved
TDFDQ
CDMA Teardown Free Descriptor Queue Control Register
DMAEMU
CDMA Emulation Control Register
TXGCR1[0]
Transmit Channel 0 Global Configuration Register 1
TXGCR2[0]
Transmit Channel 0 Global Configuration Register 2
RXGCR1[0]
Receive Channel 0 Global Configuration Register 1
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 127
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