TMS320C5505 Datasheet, PDF (1/142 Pages) Texas Instruments – TMS320C5505 Fixed-Point Digital Signal Processor

TMS320C5505
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TMS320C5505 Fixed-Point Digital Signal Processor
Check for Samples: TMS320C5505
SPRS660 – JANUARY 2010
1 Fixed-Point Digital Signal Processor
1.1 TMS320C5505 Features
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• HIGHLIGHTS:
• High-Perf/Low-Power, C55x™ Fixed-Point DSP
– 16.67/13.33/10/8.33-ns Instruction Cycle Time
– 60-, 75-, 100-, 120-MHz Clock Rate
• 320K Bytes On-Chip RAM
• 16-/8-Bit External Memory Interface (EMIF)
• Two MultiMedia Card/Secure Digital I/Fs
• Serial-Port I/F (SPI) With Four Chip-Selects
• Four Inter-IC Sound (I²S Bus™)
• USB 2.0 Full- and High-Speed Device
• LCD Bridge With Asynchronous Interface
• Tightly-Coupled FFT Hardware Accelerator
• 10-Bit 4-Input Successive Approximation (SAR)
ADC
• Real-Time Clock (RTC) With Crystal Input
• Four Core Isolated Power Supply Domains
• Four I/O Isolated Power Supply Domains
• One integrated LDO
• Industrial Temperature Devices Available
• 1.05-V Core, 1.8/2.5/2.8/3.3-V I/Os
• 1.3-V Core, 1.8/2.5/2.8/3.3-V I/Os
• FEATURES:
• High-Performance, Low-Power, TMS320C55x™
Fixed-Point Digital Signal Processor
– 16.67-, 13.33, 10-, 8.33-ns Instruction Cycle
Time
– 60-, 75-, 100-, 120-MHz Clock Rate
– One/Two Instruction(s) Executed per Cycle
– Dual Multipliers [Up to 200 or 240 Million
Multiply-Accumulates per Second (MMACS)]
– Two Arithmetic/Logic Units (ALUs)
– Three Internal Data/Operand Read Buses
and Two Internal Data/Operand Write Buses
– Fully Software-Compatible With C55x
Devices
– Industrial Temperature Devices Available
• 320 K Bytes Zero-Wait State On-Chip RAM,
Composed of:
– 64K Bytes of Dual-Access RAM (DARAM),
8 Blocks of 4K x 16-Bit
– 256K Bytes of Single-Access RAM (SARAM),
32 Blocks of 4K x 16-Bit
• 128K Bytes of Zero Wait-State On-Chip ROM
(4 Blocks of 16K x 16-Bit)
• 4M x 16-Bit Maximum Addressable External
Memory Space (SDRAM/mSDRAM)
• 16-/8-Bit External Memory Interface (EMIF) with
Glueless Interface to:
– 8-/16-Bit NAND Flash, 1- and 4-Bit ECC
– 8-/16-Bit NOR Flash
– Asynchronous Static RAM (SRAM)
– 16-bit SDRAM/mSDRAM (1.8-, 2.5-, and 3.3-V)
• Direct Memory Access (DMA) Controller
– Four DMA With 4 Channels Each
(16-Channels Total)
• Three 32-Bit General-Purpose Timers
– One Selectable as a Watchdog and/or GP
• Two MultiMedia Card/Secure Digital (MMC/SD)
Interfaces
• Universal Asynchronous Receiver/Transmitter
(UART)
• Serial-Port Interface (SPI) With Four
Chip-Selects
• Master/Slave Inter-Integrated Circuit (I²C Bus™)
• Four Inter-IC Sound (I²S Bus™) for Data
Transport
• Device USB Port With Integrated 2.0
High-Speed PHY that Supports:
– USB 2.0 Full- and High-Speed Device
• LCD Bridge With Asynchronous Interface
• Tightly-Coupled FFT Hardware Accelerator
• Real-Time Clock (RTC) With Crystal Input, With
Separate Clock Domain, Separate Power
Supply
• Four Core Isolated Power Supply Domains:
Analog, RTC, CPU and Peripherals, and USB
• Four I/O Isolated Power Supply Domains: RTC
I/O, EMIF I/O, USB PHY, and DV_DDIO
• One integrated LDO (ANA_LDO) to power DSP
PLL (V_{DDA_PLL}) and 10-bit SAR ADC
• Low-Power S/W Programmable Phase-Locked
Loop (PLL) Clock Generator
• On-Chip ROM Bootloader (RBL) to Boot From
NAND Flash, NOR Flash, SPI EEPROM, SPI
Serial Flash or I2C EEPROM
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