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TS3L301 Datasheet, PDF (12/16 Pages) Texas Instruments – 16 BIT TO 8 BIT SPDT GIGABIT LAN SWITCH WITH LOW AND FLAT ON STATE RESISTANCE
TS3L301
16ĆBIT TO 8ĆBIT SPDT GIGABIT LAN SWITCH
WITH LOW AND FLAT ONĆSTATE RESISTANCE
SCDS178B − NOVEMBER 2004 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
VBIAS
EXT TRIGGER
BIAS
Network Analyzer
(HP8753ES)
P1
P2
VSEL
VDD
A0
0B1
A1
1B1
DUT
0B2
1B2
SEL
RL = 100 Ω
NOTES: A. CL includes probe and jig capacitance.
B. A 50-Ω termination resistor is needed to match the loading of the network analyzer.
Figure 8. Test Circuit for Off Isolation (OIRR)
OFF isolation is measured at the output of the OFF channel. For example, when VSEL = GND and A1 is the input,
the output is measured at 1B2. All unused analog input (A) ports are connected to ground, and output (B) ports are
left open.
HP8753ES setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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