TLK1201ARCP Datasheet, PDF (12/21 Pages) Texas Instruments – ETHERNET TRANSCEIVERS

TLK1201ARCP, TLK1201AIRCP
ETHERNET TRANSCEIVERS
SLLS580A – FEBRUARY 2004 – REVISED JUNE 2004
TRANSMITTER/RECEIVER CHARACTERISTICS
V_(cm)
I_lkg(R)
C_I
t_(TJ)
t_(DJ)
t_r, t_f
t_d(Txlatency)
t_d(Rxlatency)
PARAMETER
V_OD = |TxD-TxN|
Transmit common mode voltage range
Receiver input voltage requirement,
V_ID = |RxP - RxN|
Receiver common mode voltage range, (RxP
+ RxN)/2
Receiver input leakage current
Receiver input capacitance
Serial data total jitter (peak-to-peak)
Serial data deterministic jitter (peak-to-peak)
Differential signal rise, fall time (20% to 80%)
Serial data jitter tolerance minimum required
eye opening, (per IEEE-802.3 specification)
Receiver data acquisition lock time from
powerup
Data relock time from loss of synchronization
Tx latency
TBI modes
DDR mode
TBI modes
DDR mode
Rx latency
TBI mode
DDR mode
TBI mode
DDR mode
TEST CONDITIONS
R_t = 50Ω
R_t = 75 Ω
R_t = 50Ω
R_t = 75 Ω
Differential output jitter, Random +
deterministic, PRBS pattern,
R_ω = 125 MHz
Differential output jitter, Random +
deterministic, PRBS pattern,
R_ω = 106.25 MHz
Differential output jitter, PRBS pattern,
R_ω = 125 MHz
R_L = 50 Ω, C_L = 5 pF, See NoLabel
and NoLabel
Differential input jitter, Random +
deterministic, R_ω = 125 MHz
Differential input jitter, random +
determinisitc, PRBS pattern at zero
crossing
See Figure 1
See Figure 6
600–620 Mbps
600–620 Mbps
1228.8 Mbps
1228.8 Mbps
www.ti.com
MIN TYP MAX UNIT⁽¹⁾
600 850 1100
mV
800 1050 1200
1100 1250 1400 mV
200
1600 mV
1000 1250 2250 mV
-350
350 µA
2 pF
0.24 UI
0.2 UI
0.10 UI
100
250 ps
0.25
UI
0.3
UI
500 µs
1024 Bit times
19
20
UI
29
30
20
31
27
34
24
28
UI
27
31
25
29
27
33
(1) UI = serial bit time
TX+
t_r
TX−
80% ^{∼ V}
50%
20% _{∼ V}
t_f
∼V
80%
50%
20% ∼ V
t_f
80%
VOD
20%
t_r
∼ 1V
0V
∼ −1V
Figure 7. Differential and Common-Mode Output Voltage Definitions
12