TICPAL22V10Z-25C Datasheet, PDF (12/22 Pages) Texas Instruments – EPICE CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS

TICPAL22V10Z-25C, TICPAL22V10Z-30I
EPIC™ CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS
SRPS007C – D3323, SEPTEMBER 1989 – REVISED FEBRUARY 1992
preload procedure for registered outputs (see Notes 2 and 3)
The output registers can be preloaded to any desired state during device testing. This permits any state to be
tested without having to setup through the entire state-machine sequence. Each register is preloaded
individually by following the steps given below. The output level depends on the polarity selected during
programming.
Step 1. With V_CC at 5 V and pin 1 at V_IL, raise pin 8 to V_IHH.
Step 2. Apply either V_IL or V_IH to the output corresponding to the register to be preloaded.
Step 3. Pulse pin 1, clocking in preload data.
Step 4. Remove output voltage, then lower pin 8 to V_IL. Preload can be verified by observing the voltage level
at the output pin.
Pin 8
CLK/I
tsu
td
td
tw
VIHH
VIL
VIH
VIL
Registered I/O
Input
VIH
VOH
Output
VIL
VOL
Figure 2. Preload Waveforms
NOTES: 2. Pin numbers shown are for the JTL and NT packages only. If chip-carrier socket adapter is not used, pin numbers must be changed
accordingly.
3. t_d = t_su = t_w = 100 ns to 1000 ns. V_IHH = 10.25 V to 10.75 V.
programming information
Texas Instruments programmable logic devices can be programmed using widely available software and
inexpensive device programmers.
Complete programming specifications, algorithms, and the latest information on hardware, software, and
firmware are available upon request. Information on programmers capable of programming Texas Instruments
programmable logic is also available, upon request, from the nearest TI field sales office, local authorized TI
distributor, or by calling Texas Instruments at [phone].
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