LP2998MRX Datasheet, PDF (12/26 Pages) Texas Instruments – LP2998 DDR-I and DDR-II Termination Regulator

LP2998
SNVS521I – DECEMBER 2007 – REVISED APRIL 2013
www.ti.com
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90
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SOP Board
JEDEC Board
200 400 600 800 1000
AIRFLOW (Linear Feet per Minute)
Figure 18. θ_JA vs Airflow (SOIC-8)
Additional improvements can be made by the judicious use of vias to connect the part and dissipate heat to an
internal ground plane. Using larger traces and more copper on the top side of the board can also help. With
careful layout, it is possible to reduce the θ_JA further than the nominal values shown in Figure 18.
Optimizing the θ_JA and placing the LP2998 in a section of a board exposed to lower ambient temperature allows
the part to operate with higher power dissipation. The internal power dissipation can be calculated by summing
the three main sources of loss: output current at V_TT, either sinking or sourcing, and quiescent currents at AVIN
and VDDQ. During the active state (when shutdown is not held low) the total internal power dissipation can be
calculated from the following equations:
P_D = P_AVIN + P_VDDQ + P_VTT
(3)
Where,
P_AVIN = I_AVIN * V_AVIN
(4)
P_VDDQ = V_VDDQ * I_VDDQ = V_VDDQ² x R_VDDQ
(5)
To calculate the maximum power dissipation at V_TT, both the sinking and sourcing current conditions need to be
examined. Although only one equation will add into the total, V_TT cannot source and sink current simultaneously.
P_VTT = V_VTT x I_LOAD (Sinking) or
(6)
P_VTT = ( V_PVIN - V_VTT) x I_LOAD (Sourcing)
(7)
The power dissipation of the LP2998 can also be calculated during the shutdown state. During this condition the
output V_TT will tri-state. Therefore, that term in the power equation will disappear as it cannot sink or source any
current (leakage is negligible). The only losses during shutdown will be the reduced quiescent current at AVIN
and the constant impedance that is seen at the VDDQ pin.
P_D = P_AVIN + P_VDDQ
P_AVIN = I_AVIN x V_AVIN
P_VDDQ = V_VDDQ * I_VDDQ = V_VDDQ² x R_VDDQ
(8)
(9)
(10)
Typical Application Circuits
Several different application circuits have been shown in Figure 19 through Figure 28 to illustrate some of the
options that are possible in configuring the LP2998. Graphs of the individual circuit performance can be found in
the Typical Performance Characteristics section of the datasheet. These curves illustrate how the maximum
output current is affected by changes in AVIN and PVIN.
SSTL-2 APPLICATIONS
For the majority of applications that implement the SSTL-2 termination scheme it is recommended to connect all
the input rails to the 2.5V rail. This provides an optimal trade-off between power dissipation and component count
and selection. An example of this circuit can be seen in Figure 19.
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