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TMS320F28055 Datasheet, PDF (119/143 Pages) Texas Instruments – Piccolo Microcontrollers
TMS320F28055, TMS320F28054, TMS320F28053
TMS320F28052, TMS320F28051, TMS320F28050
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SPRS797 – NOVEMBER 2012
6.9.2 Enhanced Capture Module Register Descriptions
Table 6-35 shows the eCAP Control and Status Registers.
NAME
TSCTR
CTRPHS
CAP1
CAP2
CAP3
CAP4
Reserved
ECCTL1
ECCTL2
ECEINT
ECFLG
ECCLR
ECFRC
Reserved
Table 6-35. eCAP Control and Status Registers
eCAP1
0x6A00
0x6A02
0x6A04
0x6A06
0x6A08
0x6A0A
0x6A0C – 0x6A12
0x6A14
0x6A15
0x6A16
0x6A17
0x6A18
0x6A19
0x6A1A – 0x6A1F
SIZE (x16)
2
2
2
2
2
2
8
1
1
1
1
1
1
6
EALLOW PROTECTED
DESCRIPTION
Time-Stamp Counter
Counter Phase Offset Value Register
Capture 1 Register
Capture 2 Register
Capture 3 Register
Capture 4 Register
Reserved
Capture Control Register 1
Capture Control Register 2
Capture Interrupt Enable Register
Capture Interrupt Flag Register
Capture Interrupt Clear Register
Capture Interrupt Force Register
Reserved
6.9.3 Enhanced Capture Module Electrical Data/Timing
Table 6-36 shows the eCAP timing requirement and Table 6-37 shows the eCAP switching characteristics.
Table 6-36. Enhanced Capture (eCAP) Timing Requirement(1)
tw(CAP)
Capture input pulse width
Asynchronous
Synchronous
With input qualifier
(1) For an explanation of the input qualifier parameters, see Table 6-45.
MIN
2tc(SCO)
2tc(SCO)
1tc(SCO) + tw(IQSW)
MAX
UNIT
cycles
cycles
cycles
Table 6-37. eCAP Switching Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
MIN
tw(APWM)
Pulse duration, APWMx output high/low
20
MAX
UNIT
ns
Copyright © 2012, Texas Instruments Incorporated
Peripheral Information and Timings 119
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