TMS320F28055 Datasheet, PDF (101/143 Pages) Texas Instruments – Piccolo Microcontrollers

TMS320F28055, TMS320F28054, TMS320F28053
TMS320F28052, TMS320F28051, TMS320F28050
www.ti.com
Figure 6-19 shows the SCI module block diagram.
SPRS797 – NOVEMBER 2012
Frame Format and Mode
Parity
Even/Odd Enable
SCICCR.6 SCICCR.5
TXWAKE
SCICTL1.3
1
WUT
LSPCLK
SCIHBAUD. 15 - 8
Baud Rate
MSbyte
Register
SCILBAUD. 7 - 0
Baud Rate
LSbyte
Register
SCIRXST.7 SCIRXST.4 - 2
RX Error
FE OE PE
RX Error
SCICTL1.1
TXSHF
Register
8
TXENA
Transmitter-Data
Buffer Register
8
TX FIFO _0
TX FIFO _1
TX FIFO
Interrupts
-----
TX FIFO _3
SCITXBUF.7-0
TX FIFO registers
SCITXD
TX EMPTY
SCICTL2.6
TXRDY
SCICTL2.7
TX INT ENA
SCICTL2.0
TX Interrupt
Logic
SCI TX Interrupt select logic
SCIFFENA
SCIFFTX.14
AutoBaud Detect logic
RXSHF
Register
RXENA
8 ^SCICTL1.0
Receive Data
Buffer register
SCIRXBUF.7-0
8
RX FIFO _3
-----
RX FIFO_1
RX FIFO _0
RX FIFO
Interrupts
SCIRXBUF.7-0
RX FIFO registers
RXFFOVF
SCIFFRX.15
SCIRXD
RXWAKE
SCIRXST.1
RXRDY
SCIRXST.6
SCICTL2.1
RX/BK INT ENA
BRKDT
SCIRXST.5
RX Interrupt
Logic
TXINT
To CPU
RXINT
To CPU
SCITXD
SCIRXD
RX ERR INT ENA
SCICTL1.6
SCI RX Interrupt select logic
Figure 6-19. Serial Communications Interface (SCI) Module Block Diagram
Copyright © 2012, Texas Instruments Incorporated
Peripheral Information and Timings 101
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TMS320F28050