SM320DM642-EP_10 Datasheet, PDF (113/170 Pages) Texas Instruments – Video/Imaging Fixed Point Digital Signal Processor

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SM320DM642-EP
Video/Imaging Fixed Point Digital Signal Processor
SGUS058C – JUNE 2007 – REVISED JUNE 2009
Table 5-34. Switching Characteristics Over Recommended Operating Conditions for McASP
(see Figure 5-33 and Figure 5-34)⁽¹⁾
NO.
9
t_c(AHCKRX)
10 t_w(AHCKRX)
11 t_c(CKRX)
12 t_w(CKRX)
13 t_d(CKRX-FRX)
14 t_d(CKX-AXRV)
15 t_{dis(CKRX-AXRHZ)}
PARAMETER
Cycle time, AHCLKR/X
Pulse duration, AHCLKR/X high or low
Cycle time, ACLKR/X
Pulse duration, ACLKR/X high or low
Delay time, ACLKR/X transmit edge to AFSX/R output valid
Delay time, ACLKX transmit edge to AXR output valid
Disable time, AXR high impedance following last data bit from
ACLKR/X transmit edge
ACLKR/X int
ACLKR/X int
ACLKR/X int
ACLKR/X ext
ACLKX int
ACLKX ext
ACLKR/X int
ACLKR/X ext
–500
–600
–720
MIN MAX
20
10
33
16.5
–1
5
0
10
–1
5
0
10
0
10
0
10
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(1) ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1
ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0
ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1
ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1
ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0
ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1
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DM642 Peripheral Information and Electrical Specifications 113