TMS320VC5470ZHKA Datasheet, PDF (11/94 Pages) Texas Instruments – TMS320VC5470 Fixed-Point Digital Signal Processor

Introduction
2 Introduction
This section describes the main features, gives a brief functional overview of the TMS320VC5470, lists the
pin assignments, and provides a signal description table. The data manual also provides a detailed description
section, electrical specifications, parameter measurement information, and mechanical data section
describing the available packaging.
NOTE: This data manual is designed to be used in conjunction with the TMS320C54x DSP
Functional Overview (literature number SPRU307) and the TMS320VC547x CPU and
Peripherals Reference Guide (literature number SPRU038).
2.1 Description
The TMS320VC5470 integrates a DSP subsystem based on the TMS320C54x architecture and a RISC
microcontroller subsystem based on the ARM7TDMI core as shown in Figure 2−1. The DSP subsystem
includes 72K x 16-bit SRAM, a timer, a DMA controller, an external memory interface, and two McBSPs. The
MCU subsystem includes three timers, general-purpose I/O, and an external memory interface.
The TMS320VC5470 is implemented as two major subsystems that are highly independent. The DSP
subsystem includes the following modules:
• TMS320C54x DSP core
• 72K x 16-bit internal SRAM organized as 32K x 16-bit of data SRAM and 40K x 16-bit of program SRAM.
• ARM port interface (API) to provide access by the MCU to 8K x 16 of the DSP’s data SRAM
• Two multichannel buffered serial ports (McBSPs)
• Phase-locked loop (PLL)
• Timer
• Direct memory access (DMA) controller
• Programmable wait-state generator
• External memory interface
The MCU subsystem includes the following modules:
• ARM7TDMI CPU core (32/16-bit RISC processor) with extended emulation capabilities
• MCU memory interface for external SRAM, Flash, ROM, and SDRAM.
• On-chip 16K-byte (4K x 32) zero wait-state SRAM.
• MCU general-purpose I/Os (GPIOs), including support for an 8 x 8 keyboard.
• Three timers (two general-purpose, one watchdog)
• IrDA-compatible UART, supporting two modes
− IrDA mode
− UART mode without hardware flow control
• UART/Modem, with
− hardware flow control support
− autobaud function
• MCU subsystem interrupt handler
• Clock generator and control
• I²C “master-only” interface
• Serial peripheral interface
• Phase-locked loop (PLL)
2
SPRS017B
December 2001 − Revised December 2002