TLK3101 Datasheet, PDF (11/24 Pages) Texas Instruments – 2.5 Gbps to 3.125 Gbps TRANSCEIVER

TLK3101
2.5 Gbps to 3.125 Gbps TRANSCEIVER
SCAS649A – AUGUST 2000 – REVISED FEBRUARY 2001
redundant port operation
The TLK3101 allows users to design redundant ports by connecting receive data bus pins from two TLK3101
devices together. Asserting LCKREFN to a low state will cause the receive data bus pins, RXD[0:15], RX_CLK
and RX_ER, RX_DV/LOS to go to a high-impedance state.
PRBS verification
The TLK3101 also has a built-in BERT function in the receiver side that is enabled by PRBSEN. It checks for
errors and reports the errors by forcing the RX_ER/PRBSPASS pin low.
reference clock input
The reference clock (GTX_CLK) is an external input clock that synchronizes the transmitter interface. The
reference clock is then multiplied in frequency 10 times to produce the internal serialization bit clock. The internal
serialization bit clock is frequency-locked to the reference clock and used to clock out the serial transmit data
on both its rising and falling edges, providing a serial data rate that is 20 times the reference clock.
operating frequency range
The TLK3101 is optimized for operation at a serial data rate of 3.125 Gbit/s. The TLK3101 may operate at a
serial data rate between 2.5 Gbit/s to 3.125 Gbit/s. GTX_CLK must be within ±100 PPM of the desired parallel
data rate clock.
testability
The TLK3101 has a comprehensive suite of built-in self-tests. The loopback function provides for at-speed
testing of the transmit/receive portions of the circuitry. The ENABLE pin allows for all circuitry to be disabled so
that a quiescent current test can be performed. The PRBS function allows for BIST (built-in self-test).
loop-back testing
The transceiver can provide a self-test function by enabling (LOOPEN) the internal loopback path. Enabling this
pin will cause serial transmitted data to be routed internally to the receiver. The parallel data output can be
compared to the parallel input data for functional verification. The external differential output is held in a
high-impedance state during the loopback testing.
built-in self-test
The TLK3101 has a BIST (built-in self-test) function. By combining PRBS with loopback, an effective self-test
of all the circuitry running at full speed can be realized. The successful completion of the BIST is reported on
the RX_ER/PRBS_PASS pin.
power-on reset
Upon application of minimum valid power, the TLK3101 generates a power-on reset. During the power-on reset
the RXD, RX_ER and RX_DV/LOS signal pins go to 3-state mode. RX_CLK is held low. The length of the
power-on reset cycle is dependent upon the REFCLK frequency but is less than 1-ms in duration.
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