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SN74AVC16646 Datasheet, PDF (11/18 Pages) Texas Instruments – 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
www.ti.com
From Output
Under Test
CL = 15 pF
(see Note A)
SN74AVC16646
16-BIT BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCES181F – DECEMBER 1998 – REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
VCC = 1.2 V AND 1.5 V ± 0.1 V
2 kΩ S1
2 kΩ
2 × VCC
Open
GND
TEST
tpd
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2 × VCC
GND
LOAD CIRCUIT
Timing
Input
Data
Input
VCC/2
VCC
0V
tsu
th
VCC/2
VCC
VCC/2
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Input
VCC/2
VCC
VCC/2
0V
tPLH
tPHL
Output
VCC/2
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VCC/2
VOH
VOL
Input
tw
VCC/2
VCC
VCC/2
0V
VOLTAGE WAVEFORMS
PULSE DURATION
Output
Control
(low-level
enabling)
VCC/2
VCC
VCC/2
0V
tPZL
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
VCC/2
tPLZ
VCC
VOL + 0.1 V
VOL
tPZH
tPHZ
Output
Waveform 2
S1 at GND
(see Note B)
VCC/2
VOH
VOH − 0.1 V
0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 3. Load Circuit and Voltage Waveforms
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