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DS90C185 Datasheet, PDF (11/19 Pages) Texas Instruments – Low Power 1.8V FPD-Link (LVDS) Serializer
LVDS Interface / TFT Color Data
recommended Mapping
Different color mapping options exist. Check with the color
mapping of the Deserializer / TCON device that is used to
ensure compatible mapping for the application. The
DS90C185 supports single pixel interfaces with either 24bpp
or 18bpp color depths.
The DS90C185 provides four LVDS data lines along with an
LVDS clock line (4D+C) for the 28 LVCMOS data inputs. The
28 bit interface typically assigns 24 bits to RGB color data, 3
bits to video control (HS, VS and DE) and one spare bit can
be ignored, used for L/R signaling or function as a general
purpose bit. The single pixel 24bpp 4D+C LVDS interface
mapping is shown Figure 13. A single pixel 18bpp mode is
also supported by utilizing the 18B_MODE pin. In this config-
uration the TxOUT3 output channel is place in TRI-STATE®
to save power. Its respective inputs are ignored. This mapping
is shown in Figure 12.
FIGURE 12. DS90C185 LVDS Map — 18B_MODE = H
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FIGURE 13. DS90C185 LVDS Map — 18B_MODE = L
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