DRV8833_15 Datasheet, PDF (11/28 Pages) Texas Instruments – DRV8833 Dual H-Bridge Motor Driver

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DRV8833
SLVSAR1E – JANUARY 2011 – REVISED JULY 2015
7.3.4 nSLEEP Operation
Driving nSLEEP low will put the device into a low power sleep state. In this state, the H-bridges are disabled, the
gate drive charge pump is stopped, all internal logic is reset, and all internal clocks are stopped. All inputs are
ignored until nSLEEP returns inactive high. When returning from sleep mode, some time (up to 1 ms) needs to
pass before the motor driver becomes fully operational. To make the board design simple, the nSLEEP can be
pulled up to the supply (VM). TI recommends using a pullup resistor when this is done. This resistor limits the
current to the input in case VM is higher than 6.5 V. Internally, the nSLEEP pin has a 500-kΩ resistor to GND. It
also has a clamping Zener diode that clamps the voltage at the pin at 6.5 V. Currents greater than 250 µA can
cause damage to the input structure. Hence the recommended pullup resistor would be between 20 kΩ and
75 kΩ.
7.3.5 Protection Circuits
The DRV8833 is fully protected against undervoltage, overcurrent and overtemperature events.
7.3.5.1 Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by limiting the gate drive. If this
analog current limit persists for longer than the OCP deglitch time, all FETs in the H-bridge will be disabled and
the nFAULT pin will be driven low. The driver will be re-enabled after the OCP retry period (t_OCP) has passed.
nFAULT becomes high again at this time. If the fault condition is still present, the cycle repeats. If the fault is no
longer present, normal operation resumes and nFAULT remains deasserted. Please note that only the H-bridge
in which the OCP is detected will be disabled while the other bridge will function normally.
Overcurrent conditions are detected independently on both high- and low-side devices; that is, a short to ground,
supply, or across the motor winding will all result in an overcurrent shutdown. Overcurrent protection does not
use the current sense circuitry used for PWM current control, so it functions even without presence of the xISEN
resistors.
7.3.5.2 Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled and the nFAULT pin will be
driven low. Once the die temperature has fallen to a safe level, operation will automatically resume.
7.3.5.3 Undervoltage Lockout (UVLO)
If at any time the voltage on the VM pin falls below the undervoltage lockout threshold voltage, all circuitry in the
device will be disabled, and all internal logic will be reset. Operation will resume when VM rises above the UVLO
threshold. nFAULT is driven low in the event of an undervoltage condition.
FAULT
VM undervoltage
(UVLO)
Overcurrent (OCP)
Thermal Shutdown
(TSD)
CONDITION
V_M < 2.5 V
I_OUT > I_OCP
T_J > T_TSD
Table 3. Device Protection
ERROR REPORT
H-BRIDGE
None
FAULTn
FAULTn
Disabled
Disabled
Disabled
INTERNAL
CIRCUITS
Disabled
Operating
Operating
RECOVERY
V_M > 2.7 V
OCP
T_J < T_TSD – T_HYS
7.4 Device Functional Modes
The DRV8833 is active unless the nSLEEP pin is brought logic low. In sleep mode, the H-bridge FETs are
disabled (Hi-Z). The DRV8833 is brought out of sleep mode automatically if nSLEEP is brought logic high.
tWAKE must elapse before the outputs change state after wakeup.
FAULT
Operating
Sleep mode
Fault encountered
Table 4. Modes of Operation
CONDITION
nSLEEP pin high
nSLEEP pin low
Any fault condition met
H-BRIDGE
Operating
Disabled
Disabled
INTERNAL CIRCUITS
Operating
Disabled
See Table 3
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