ADS62P15 Datasheet, PDF (11/57 Pages) Texas Instruments – Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs

www.ti.com
Input
Cclock
CLKM
CLKP
t _PDI
CLKOUTM
Output
Cclock
CLKOUTP
t _ssuu t _hh
t _ssuu t _hh
OOuuttppuutt ^Dn_Dn+1_P,
Dn *
Ddaattaa Ppaaiirr Dn_Dn+1_M
Dn +1*
*Dn - Bits D0, D2, D4, D6, D8, D10
*Dn+1 - Bits D1, D3, D5, D7, D9
Figure 3. LVDS Mode Timing
Input
Cclock
CLKM
CLKP
t _PPDDII
Output
Cclock
CLKOUT
t _ssuu
t _hh
Output
Ddata
Dn
Dn *
*Dn - Bits D0 to D10
Figure 4. CMOS Mode Timing
ADS62P15
SLAS572 – OCTOBER 2007
Copyright © 2007, Texas Instruments Incorporated
Product Folder Link(s): ADS62P15
Submit Documentation Feedback
11