LM3S9B95 Datasheet, PDF (1011/1282 Pages) Texas Instruments – Stellaris® LM3S9B95 Microcontroller

Stellaris® LM3S9B95 Microcontroller
Register 331: USB ID Valid Detect Interrupt Status and Clear (USBIDVISC),
offset 0x44C
This 32-bit register specifies the masked interrupt status of the ID valid detect. It also provides a
OTG
method to clear the interrupt state.
USB ID Valid Detect Interrupt Status and Clear (USBIDVISC)
Base 0x4005.0000
Offset 0x44C
Type R/W1C, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
ID
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO R/W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:1
0
Name
reserved
ID
Type
Reset Description
RO 0x0000.000 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
R/W1C
0
ID Valid Detect Interrupt Status and Clear
Value Description
1 The ID bits in the USBIDVRIS and USBIDVIM registers are
set, providing an interrupt to the interrupt controller.
0 No interrupt has occurred or the interrupt is masked.
This bit is cleared by writing a 1. Clearing this bit also clears the ID bit
in the USBIDVRIS register.
June 14, 2010
Texas Instruments-Advance Information
1011