TLC2943 Datasheet, PDF (10/27 Pages) Texas Instruments – HIGH-PERFORMANCE DUAL PHASE-LOCKED BUILDING BLOCK

TLC2943
HIGH-PERFORMANCE DUAL PHASE-LOCKED BUILDING BLOCK
SLAS249 – NOVEMBER 1999
electrical characteristics over recommended operating free-air temperature range, V_DD = 5 V
(unless otherwise noted) (continued)
VCO section
PARAMETER
TEST CONDITIONS
MIN NOM MAX UNIT
VOH
VOL
V(TH+)
II
Z(VCOIN)
IDD(INH)
IDD(VCO)
High-level output voltage
Low-level output voltage
Positive input threshold voltage
Input current
VCOIN input impedance
VCO supply current (inhibit) (for one chip)
VCO supply current (for one chip)
IOH = – 2 mA
IOL = 2 mA
VI = VDD or GND
VCOIN = 1/2VDD
See Note 5
See Note 6
4.5
1.5 2.5
10
0.01
14
V
0.5 V
3.5 V
± 1 µA
MΩ
1 µA
35 mA
NOTES: 5. The current into VCO VDD and LOGIC VDD when VCO INHIBIT = VDD and PFD INHIBIT is high.
6. The current into VCO VDD and LOGIC VDD when VCO IN = 1/2 VDD , RBIAS = 2.4 kΩ, VCO INHIBIT = ground, and PFD INHIBIT
is high.
PFD section
PARAMETER
TEST CONDITIONS
MIN NOM MAX UNIT
VOH
VOL
IOZ
VIH
VIL
V(TH+)
High-level output voltage
Low-level output voltage
High-impedance state output current
High-level input voltage at FIN–A, FIN–B
Low-level input voltage at FIN–A, FIN–B
Positive input threshold voltage at PFD
INHIBIT
IOH = – 2 mA
IOL = 2 mA
PFD INHIBIT = high,
VO = VDD or GND
4.5
V
0.2 V
± 1 µA
3.5
V
1.5 V
1.5 2.5 3.5 V
CI
Input capacitance at FIN–A, FIN–B
7
pF
ZI
Input impedance at FIN–A, FIN–B
10
MΩ
IDD(PFD) PFD supply current
See Note 9
2.6
8 mA
NOTE 9: The current into LOGIC VDD when FIN–A and FIN–B = 50 MHz (V I(PP) = 5 V, rectangular wave), PFD INHIBIT = GND, PFD OUT open,
and VCO OUT is inhibited.
10
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