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THS7530 Datasheet, PDF (10/19 Pages) Texas Instruments – HIGH-SPEED, FULLY DIFFERENTIAL, CONTINUOUSLY VARIABLE GAIN AMPLIFIER
THS7530
SLOS405A DECEMBER 2002– REVISED APRIL 2003
APPLICATION INFORMATION
www.ti.com
The THS7530 is designed for nominal 5-V power supply from VS+ to VS–.
The amplifier has fully differential inputs, VIN+ and VIN–, and fully differential outputs, VOUT+ and VOUT– The
inputs are high impedance and outputs are low impedance. External resistors are recommended for impedance
matching and termination purposes.
The inputs and outputs can be dc-coupled, but for best performance, the input and output common-mode
voltage should be maintained at the midpoint between the two supply pins. The output common-mode voltage
is controlled by the voltage applied to VOCM. Left unterminated, VOCM is set to midsupply by internal resistors.
A 0.1-µF bypass capacitor should be placed between VOCM and ground to reduce common-mode noise. The
input common-mode voltage defaults to midrail when left unconnected. For voltages other than midrail, VOCM
must be biased by external means. VIN+ and VIN– both require a nominal 30-µA bias current for proper operation.
Therefore, insure equal input impedance at each input to avoid generating an offset voltage that varies with gain.
Voltage applied from VG– to VG+ controls the gain of the part with 38.8-dB/V gain slope. The input can be
differential or single ended. VG– must be maintained within –0.6 V and +0.8 V of VS– for proper operation. The
negative gain input should typically be tied directly to the negative power supply.
VCL+ and VCL– are inputs that limit the output voltage swing of the amplifier. The voltages applied set an absolute
limit on the voltages at the output. Input voltages at VCL+ and VCL– clamp the output insuring that neither output
exceeds those values.
The power-down input is a TTL compatible input, referenced to the negative supply voltage. A logic low puts
the THS7530 in power savings mode. In power-down mode the part consumes less than 1-mA current, the
output goes high impedance, and a high amount of isolation is maintained between the input and output.
Power supply bypass capacitors are required for proper operation. A 6.8-µF tantalum bulk capacitor is
recommended if the amplifier is located far from the power supply and may be shared among other devices.
A ceramic 0.1-µF capacitor is recommended within 0.1” of the device power pin. The ceramic capacitors should
be located on the same layer as the amplifier to eliminate the use of vias between the capacitors and the power
pin.
The following circuits show some basic circuit configurations.
1 kΩ
1:1
VIN
1 kΩ
VS+ = 5 V
0.1 µF
50 Ω
VOCM
PD
0.1 µF
VCL+
VCL–
0.1 µF
33 pF
24.9 Ω
THS7530
VG–
VS– VG+
24.9 Ω
33 pF
6.8 µF
1:1
VOUT
Figure 20. EVM Schematic: Designed for Use With Typical 50- RF Test Equipment
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