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THS4631 Datasheet, PDF (10/27 Pages) Texas Instruments – HIGH-VOLTAGE, HIGH SLEW RATE, WIDEBAND FET-INPUT OPERATIONAL AMPLIFIER
THS4631
SLOS451A – DECEMBER 2004 – REVISED MARCH 2005
Ǹǒ Ǔ 1
p RF G BP )
2
1
p RF G BP
)
p
4CS
RF G B
P
CF +
2
(1)
Once the optimal feedback capacitor has been selec-
ted, the transimpedance bandwidth can be calculated
with Equation 2.
Ǹ F*3dB +
GBP
2 p RF ǒCS ) CFǓ
(2)
CI(CM)
CI(DIFF)
CP
+
_
RF
I(DIODE)
CD
CF
CS = CI(CM) + CI(DIFF) + CP + CD
A. The total source capacitance is the sum of
several distinct capacitances.
Figure 33. Transimpedance Analysis Circuit
Where:
CI(CM) is the common-mode input capacitance.
CI(DIFF) is the differential input capacitance.
CD is the diode capacitance.
CP is the parasitic capacitance at the inverting
node.
The feedback capacitor provides a pole in the noise
gain of the circuit, counteracting the zero in the noise
gain caused by the source capacitance. The pole is
set such that the noise gain achieves a 20-dB per
decade rate-of-closure with the open-loop gain re-
sponse of the amplifier, resulting in a stable circuit.
As indicated, the formula given provides the feedback
capacitance for maximized flat bandwidth. Reduction
in the value of the feedback capacitor can increase
the signal bandwidth, but this occurs at the expense
of peaking in the ac response.
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Gain
AOL
−20 dB/
Decade
20 dB/Decade
Rate-of-Closure
Noise Gain
20 dB/
Decade
GBP
0
f
Zero
Pole
Figure 34. Transimpedance Circuit Bode Plot
The performance of the THS4631 has been
measured for a variety of transimpedance gains with
a variety of source capacitances. The achievable
bandwidths of the various circuit configurations are
summarized numerically in Table 1. The frequency
responses are presented in Figure 35, Figure 36, and
Figure 37.
Note that the feedback capacitances do not corre-
spond exactly with the values predicted by the
equation. They have been tuned to account for the
parasitic capacitance of the feedback resistor
(typically 0.2 pF for 0805 surface mount devices) as
well as the additional capacitance associated with the
PC board. The equation should be used as a starting
point for the design, with final values for CF optimized
in the laboratory.
Table 1. Transimpedance Performance Summary
for Various Configurations
SOURCE
CAPACITANCE
(PF)
18
18
18
47
47
47
100
100
100
TRANS-
IMPEDANCE
GAIN (Ω)
10 k
100 k
1M
10 k
100 k
1M
10 k
100 k
1M
FEEDBACK
CAPACITANCE
(PF)
2
0.5
0
2.2
0.7
0.2
3
1
0.2
-3 dB
FREQUENCY
(MHZ)
15.8
3
1.2
8.4
2.1
0.52
5.5
1.4
0.37
10