DRV8801-Q1_15 Datasheet, PDF (10/19 Pages) Texas Instruments – DMOS FULL-BRIDGE MOTOR DRIVERS

DRV8801-Q1
SLVSAS7A – FEBRUARY 2011 – REVISED JANUARY 2014
www.ti.com
PHASE
1
0
X
X
1
0
X
ENABLE
1
1
0
0
0
0
X
MODE 1
X
X
1
1
0
0
X
Control Logic Table⁽¹⁾
PINS
MODE 2
nSLEEP
OUT+
X
1
H
X
1
L
0
1
L
1
1
H
X
1
L
X
1
H
X
0
Z
OUT–
L
H
L
H
H
L
Z
OPERATION
Forward
Reverse
Brake (slow decay)
Brake (slow decay)
Fast-decay synchronous
rectification ⁽²⁾
Fast-decay synchronous
rectification ⁽²⁾
Sleep mode
(1) X = don't care, Z = high impedance
(2) To prevent reversal of current during fast-decay synchronous rectification, outputs go to the high-impedance state as the current
approaches 0 A.
Overcurrent Protection
The current flowing through the high-side and low-side drivers is monitored to ensure that the motor lead is not
shorted to supply or ground. If a short is detected, the full-bridge outputs are turned off, flag nFAULT is driven
low, and a 1.2-ms fault timer is started. After this 1.2-ms period, t_OCP, the device is then allowed to follow the
input commands and another turnon is attempted (nFAULT becomes high again during this attempt). If there is
still a fault condition, the cycle repeats. If after t_OCP expires it is determined the short condition is not present,
normal operation resumes and nFAULT is deasserted.
10
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