BQ24350 Datasheet, PDF (10/17 Pages) Texas Instruments – Over-Voltage and Over-Current Charger Front-end Protection IC With Integrated Charging FET

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SLUS943A – MAY 2009 – REVISED JUNE 2009 ............................................................................................................................................................... www.ti.com
APPLICATION INFORMATION
Selection of R_BAT
It is strongly recommended that the battery not be tied directly to the VBAT pin of the device, as under some
failure modes of the IC, the voltage at the ACIN pin may appear on the VBAT pin. This voltage can be as high as
30V, and applying 30V to the battery in case of the failure of the device can be hazardous. Connecting the VBAT
pin through R_BAT prevents a large current from flowing into the battery in case of failure of the IC. In the interests
of safety, R_BAT should have a very high value. The problem with a large R_BAT is that the voltage drop across this
resistor because of the VBAT bias current IVBAT causes an error in the BV_OVP threshold. This error is over and
above the tolerance on the nominal 4.35V BV_OVP threshold.
Choosing R_BAT in the range 100kΩ to 470kΩ is a good compromise. In the case of IC failure, with R_BAT equal to
100kΩ, the maximum current flowing into the battery would be (30V – 3V) ÷ 100kΩ = 270µA, which is low
enough to be absorbed by the bias currents of the system components. R_BAT equal to 100kΩ would result in a
worst-case voltage drop of R_BAT × I_VBAT ≈ 1mV. This is negligible compared to the internal tolerance of 50mV on
the BV_OVP threshold.
If the Battery OVP function is not required, the VBAT pin should be connected to GND.
Selection of Input and Output Bypass Capacitors
The input capacitor C_ACIN is for decoupling, and serves an important purpose. Whenever there is a step change
downwards in the system load current, the inductance of the input cable causes the input voltage to spike up.
C_ACIN prevents the input voltage from overshooting to dangerous levels. It is strongly recommended that a
ceramic capacitor of at least 1µF be used at the input of the device. It should be located in close proximity to the
ACIN pin.
C_CHGIN should also be a ceramic capacitor of at least 1µF, located close to the CHGIN pin. C_CHGIN also serves as
the input decoupling capacitor for the charging circuit downstream of the protection IC.
PCB Layout Guidelines
1. This device is a protection device, and is meant to protect down-stream circuitry from hazardous voltages.
Potentially, high voltages may be applied to this IC. It has to be ensured that the edge-to-edge clearances of
PCB traces satisfy the design rules for the maximum voltages expected to be seen in the system.
2. The device uses SON packages with a PowerPAD™. For good thermal performance, the PowerPAD should
be thermally coupled with the PCB ground plane. In most applications, this will require a copper pad directly
under the IC. This copper pad should be connected to the ground plane with an array of thermal vias.
3. C_ACIN and C_CHGIN should be located close to the IC. Other components like R_BAT should also be located close
to the IC.
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