TSB41AB1PAP Datasheet, PDF (1/69 Pages) Texas Instruments – IEEE 1394a-2000 ONE-PORT CABLE

D Fully Supports Provisions of IEEE
1394-1995 Standard for High Performance
Serial Bus^† and IEEE 1394a-2000
D Fully Interoperable With FireWire and
i.LINK Implementation of IEEE Std 1394
D Fully Compliant With OpenHCI
Requirements
D Provides One IEEE 1394a-2000 Fully
Compliant Cable Port at 100/200/400
Megabits Per Second (Mbits/s)
D Full IEEE 1394a-2000 Support Includes:
Connection Debounce, Arbitrated Short
Reset, Multispeed Concatenation,
Arbitration Acceleration, Fly-By
Concatenation, Port
Disable/Suspend/Resume
D Register Bits Give Software Control of
Contender Bit, Power Class Bits, Link
Active Control Bit, and IEEE 1394a-2000
Features
D IEEE 1394a-2000 Compliant Common Mode
Noise Filter on Incoming TPBIAS
D Extended Resume Signaling for
Compatibility With Legacy DV Devices, and
Terminal- and Register-Compatibility With
TSB41LV01, Allow Direct Isochronous
Transmit to Legacy DV Devices With Any
Link Layer Even When Root
D Power-Down Features to Conserve Energy
in Battery Powered Applications Include:
Automatic Device Power Down During
Suspend, Device Power-Down Terminal,
Link Interface Disable via LPS, and Inactive
Ports Powered Down
TSB41AB1
IEEE 1394aĆ2000 ONEĆPORT CABLE
TRANSCEIVER/ARBITER
SLLS423I − JUNE 2000 − REVISED MARCH 2005
D Failsafe Circuitry Senses Sudden Loss of
Power to the Device and Disables the Port
to Ensure That the Device Does Not Load
TPBIAS of the Connected Device and
Blocks Any Leakage Path From the Port
Back to the Device Power Plane
D Software Device Reset (SWR)
D Industry Leading Low Power Consumption
D Ultralow-Power Sleep Mode
D Cable Power Presence Monitoring
D Cable Ports Monitor Line Conditions for
Active Connection to Remote Node
D Data Interface to Link-Layer Controller
Through 2/4/8 Parallel Lines at 49.152 MHz
D Interface to Link Layer Controller Supports
Low Cost TI Bus-Holder Isolation and
Optional Annex J Electrical Isolation
D Interoperable With Link-Layer Controllers
Using 3.3 V
D Single 3.3-V Supply Operation
D Low-Cost 24.576-MHz Crystal Provides
Transmit, Receive Data at 100/200/400
Mbits/s, and Link-Layer Controller Clock at
49.152 MHz
D Low-Cost High-Performance 48/64-Pin
TQFP (PHP/PAP) Thermally Enhanced
Packages Increase Thermal Performance
by up to 210%
D Meets Intel Mobile Power Guideline 2000
D Available in 80-Ball, MicroStar Junior
BGA (GQE) Package
D Available in 64-Ball, Pb-Free, MicroStar
Junior BGA (ZQE) Package
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
† _{Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.}
FireWire is a trademark of Apple Computer, Incorporated.
i.LINK is a trademark of Sony Kabushiki Kaisha TA Sony Corporation.
Intel is a trademark of Intel Corporation.
Other trademarks are the property of their respective owners.
MicroStar Junior is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2000 − 2004, Texas Instruments Incorporated
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