TMS320C5517_15 Datasheet, PDF (1/197 Pages) Texas Instruments – TMS320C5517 Fixed-Point Digital Signal Processor

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TMS320C5517
SPRS727C – AUGUST 2012 – REVISED APRIL 2014
TMS320C5517 Fixed-Point Digital Signal Processor
1 Device Overview
1.1 Features
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• CORE:
– High-Performance, Low-Power, TMS320C55x
Fixed-Point Digital Signal Processor
• 13.33- to 5-ns Instruction Cycle Time
• 75- to 200-MHz Clock Rate
• One or Two Instructions Executed per Cycle
• Dual Multiply-and-Accumulate Units (Up to
450 Million Multiply-Accumulates per Second
[MMACS])
• Two Arithmetic and Logic Units (ALUs)
• Three Internal Data or Operand Read Buses
and Two Write Buses
• Software-Compatible with C55x Devices
• Industrial Temperature Devices Available
– 320KB of Zero-Wait State On-Chip RAM:
• 64KB of Dual-Access RAM (DARAM),
8 Blocks of 4K x 16-Bit
• 256KB of Single-Access RAM (SARAM),
32 Blocks of 4K x 16-Bit
– 128KB of Zero Wait-State On-Chip ROM
(4 Blocks of 16K x 16-Bit)
– Tightly Coupled FFT Hardware Accelerator
• PERIPHERAL:
– One Universal Host-Port Interface (UHPI) with
16-Bit Muxed Address or Data Bus
– Master and Slave Multichannel Serial Ports
Interface (McSPI) with Three Chip Selects
– Master and Slave Multichannel Buffered Serial
Ports Interface (McBSP)
– 16- and 8-Bit External Memory Interface (EMIF)
with Glueless Interface to:
• 8- or 16-Bit NAND Flash, 1- or 4-Bit ECC
• 8- and 16-Bit NOR Flash
• Asynchronous Static RAM (SRAM)
• SDRAM or mSDRAM (1.8, 2.75, and 3.3 V)
– 3.84375M x 16-Bit Maximum Addressable
External Memory Space (SDRAM or mSDRAM)
– Universal Asynchronous Receiver/Transmitter
(UART)
– Device USB Port with Integrated 2.0 High-
Speed PHY that Supports:
• USB 2.0 Full- and High-Speed Devices
– Direct Memory Access (DMA) Controller
• Four DMA with Four Channels Each
– Three 32-Bit General-Purpose (GP) Timers
• One Selectable as a Watchdog or GP
• Clocking Options, Including External
General-Purpose I/O (GPIO) Clock Input
– Two MultiMedia Card and Secure Digital
(eMMC, MMC, and SD) Interfaces
– Serial Port Interface (SPI) with Four Chip
Selects
– Master and Slave Inter-Integrated Circuit (I²C
Bus)
– Three Inter-IC Sound (I²S Bus) Modules for
Data Transport
– 10-Bit 4-Input Successive Approximation (SAR)
ADC
– IEEE-1149.1 (JTAG)
Boundary-Scan-Compatible
– Up to 26 GPIO Pins (Multiplexed with Other
Functions)
• POWER:
– Four Core Isolated Power Supply Domains:
Analog, RTC, CPU and Peripherals, and USB
– Four I/O Isolated Power Supply Domains: RTC
I/O, EMIF I/O, USB PHY, and DV_DDIO
– 1.05-V Core, 1.8-, 2.75-, or 3.3-V I/Os
– 1.3-V Core, 1.8-, 2.75-, or 3.3-V I/Os
– 1.4-V Core, 1.8-, 2.75-, or 3.3-V I/Os
• CLOCK:
– Real-Time Clock (RTC) with Crystal Input,
Separate Clock Domain, and Power Supply
– Software-Programmable Phase-Locked Loop
(PLL) Clock Generator
• BOOTLOADER:
– On-Chip ROM Bootloader
• Each Peripheral Supports Unencrypted
Booting
• PACKAGE:
– 196-Terminal Pb-Free Plastic BGA (Ball Grid
Array) (ZCH Suffix), 0.65-mm Pitch
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.