PCI2031 Datasheet, PDF (1/70 Pages) Texas Instruments – PCI-TO-PCI BRIDGE

D PCI Power Management Compliant
D ACPI 1.0 Compliant
D Supports PCI Local Bus Specification 2.1
and PCI-to-PCI Bridge Specification 1.0
D 3.3-V Core Logic With Universal PCI
Interfaces Compatible With 3.3-V and 5-V
PCI Signaling Environments
D Supports Two 32-Bit, 33-MHz PCI Buses
D Provides Internal Arbitration for Up to Six
Secondary Bus Masters With
Programmable Control
D Provides Six Secondary PCI Bus Clock
Outputs
D Supports Burst Transfers to Maximize Data
Throughput on Both PCI Buses
D Provides Two Extension Windows
D EEPROM Interface for Loading Texas
Instruments (TI™) Subsystem ID and
Subsystem Vendor ID
D Four Primary and Four Secondary
General-Purpose I/Os
PCI2031
PCI-TO-PCI BRIDGE
SCPS017A – DECEMBER 1997 – REVISED JANUARY 1998
D Secondary Positive Decode
D Independent Read and Write Buffers for
Each Direction
D Predictable Latency: Compliant With PCI
Local Bus Specification 2.1
D External Arbiter Option
D Provides Concurrent Operation
D Serial IRQ Bridging
D Propagates Bus Locking
D Supports PCI Clock Run
D Secondary Bus Driven Low During Reset
D Docking Connect Detects
D PCI Local Bus Specification 2.0-Compliant
Device Optimization
D Advanced Submicron, Low-Power CMOS
Technology
D Provides VGA/Palette Memory and I/O, and
Subtractive Decoding Options
D Packaged in 176-Pin Plastic Quad Flatpack
Table of Contents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Terminal Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Signal Name/Terminal Number Sort Table . . . . . . . . . . . . . . . . . . 4
Terminal Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Introduction to the PCI2031 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PCI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Bridge Configuration Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Extension Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . 65
Recommended Operating Conditions for PCI Interface . . . . . . . . 65
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
PCI Clock/Reset Timing Requirements . . . . . . . . . . . . . . . . . . . . . . 66
PCI Timing Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Parameter Measurement Information . . . . . . . . . . . . . . . . . . . . . . . . 67
PCI Bus Parameter Measurement Information . . . . . . . . . . . . . . . . 68
Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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