LP2995LQ Datasheet, PDF (1/22 Pages) Texas Instruments – LP2995 DDR Termination Regulator

LP2995
www.ti.com
SNVS190M – FEBRUARY 2002 – REVISED MARCH 2013
LP2995 DDR Termination Regulator
Check for Samples: LP2995
FEATURES
1
•2 Low Output Voltage Offset
• Works with +5v, +3.3v and 2.5v Rails
• Source and Sink Current
• Low External Component Count
• No External Resistors Required
• Linear Topology
• Available in SOIC-8, SO PowerPAD-8 or
WQFN-16 Packages
• Low Cost and Easy to Use
APPLICATIONS
• DDR Termination Voltage
• SSTL-2
• SSTL-3
DESCRIPTION
The LP2995 linear regulator is designed to meet the
JEDEC SSTL-2 and SSTL-3 specifications for
termination of DDR-SDRAM. The device contains a
high-speed operational amplifier to provide excellent
response to load transients. The output stage
prevents shoot through while delivering 1.5A
continuous current and transient peaks up to 3A in
the application as required for DDR-SDRAM
termination. The LP2995 also incorporates a V_SENSE
pin to provide superior load regulation and a V_REF
output as a reference for the chipset and DDR
DIMMS.
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Typical Application Circuit
VDDQ = 2.5V
VDD = 2.5V
+
50PF
LP2995
VDDQ
AVIN
VREF
VSENSE
PVIN
VTT
GND
VREF = 1.25V
+
0.1PF
+
220PF
VTT = 1.25V
1
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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