DAC5682Z_15 Datasheet, PDF (1/66 Pages) Texas Instruments – DAC5682Z 16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel Digital-to-Analog Converter (DAC)

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DAC5682Z
SLLS853F – AUGUST 2007 – REVISED JANUARY 2015
DAC5682Z 16-Bit, 1.0 GSPS 2x-4x Interpolating Dual-Channel
Digital-to-Analog Converter (DAC)
1 Features
•1 16-Bit Digital-to-Analog Converter (DAC)
• 1.0 GSPS Update Rate
• 16-Bit Wideband Input LVDS Data Bus
– 8 Sample Input FIFO
– Interleaved I/Q Data for Dual-DAC Mode
• High Performance
– 73-dBc ACLR WCDMA TM1 at 180 MHz
• 2x-32x Clock Multiplying PLL/VCO
• 2x or 4x Interpolation Filters
– Stopband Transition 0.4 to 0.6 Fdata
– Filters Configurable in Either Low-Pass or
High-Pass Mode
– Allows Selection of Higher Order Image
• Fs/4 Coarse Mixer
• On-Chip 1.2-V Reference
• Differential Scalable Output: 2 to 20 mA
• Package: 64-Pin 9-mm × 9-mm QFN
2 Applications
• Cellular Base Stations
• Broadband Wireless Access (BWA)
• WiMAX 802.16
• Fixed Wireless Backhaul
• Cable Modem Termination System (CMTS)
3 Description
The DAC5682Z is a dual-channel 16-bit 1.0 GSPS
DAC with wideband LVDS data input, integrated
2x/4x interpolation filters, onboard clock multiplier,
and internal voltage reference. The DAC5682Z offers
superior linearity, noise, crosstalk, and PLL phase
noise performance.
The DAC5682Z integrates a wideband LVDS port
with on-chip termination. Full-rate input data can be
transferred to a single DAC channel, or half-rate and
1/4-rate input data can be interpolated by onboard 2x
or 4x FIR filters. Each interpolation FIR is
configurable in either low-pass or high-pass mode,
allowing selection of a higher order output spectral
image. An on-chip delay lock loop (DLL) simplifies
LVDS interfacing by providing skew control for the
LVDS input data clock.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DAC5682Z
VQFN (64)
9.00 mm × 9.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
3-Carrier WCDMA TM1 With a Gap
-20 _{Carrier Power: -15.20 dBm,}
ACLR (5 MHz): 71.18 dB,
-30 ACLR (10 MHz): 72.26 dB,
F_data = 491.52 MSPS,
IF = 184.32 MHz,
-40 _{x2 Interpolation}
PLL Off
-50
-60
-70
-80
-90
-100
-110
-120
160 165 170 175 180 185 190 195 200 205 210
f - Frequency - MHz
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.