DAC3282_15 Datasheet, PDF (1/65 Pages) Texas Instruments – DAC3282 16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter (DAC)

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DAC3282
SLAS646C – DECEMBER 2009 – REVISED MAY 2015
DAC3282 16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter
(DAC)
1 Features
•1 Dual, 16-Bit, 625 MSPS DACs
• 8-Bit Input LVDS Data Bus
– Byte-Wide Interleaved Data Load
– 8 Sample Input FIFO
– Optional Data Pattern Checker
• Multi-DAC Synchronization
• Optional 2x Interpolation Filter
• Zero-IF Sinc Correction Filter
• Fs/2 and ± Fs/4 Coarse Mixer
• Digital Offset Adjustment for LO Correction
• Temperature Sensor
• 3- or 4-Wire Serial Control Interface
• On Chip 1.2-V reference
• Differential Scalable Output: 2 to 20 mA
• Low Power: 950 mW at 625 MSPS, 845 mW at
500 MHz, Full Operating Conditions
• Space Saving Package: 48-pin 7×7mm VQFN
2 Applications
• Cellular Base Stations
• Diversity Transmit
• Wideband Communications
• Digital Synthesis
3 Description
The DAC3282 is a dual-channel 16-bit 625 MSPS
digital-to-analog converter (DAC) with an 8-bit LVDS
input data bus with on-chip termination, optional 2x
interpolation filter, and internal voltage reference. The
DAC3282 offers superior linearity, noise and crosstalk
performance.
Input data can be interpolated by 2x through an on-
chip interpolating FIR filter with over 85 dB of stop-
band attenuation. Multiple DAC3282 devices can be
fully synchronized.
The DAC3282 allows either a complex or real output.
An optional coarse mixer in complex mode provides
frequency upconversion and the dual DAC output
produces a complex Hilbert Transform pair. The
digital offset correction feature allows optimization of
LO feed-through of an external quadrature modulator
performing the final single sideband RF up-
conversion.
The DAC3282 is characterized for operation over the
entire industrial temperature range of –40°C to 85°C
and is available in a 48-pin 7×7mm VQFN package.
Device Information⁽¹⁾
PART NUMBER
PACKAGE
BODY SIZE (NOM)
DAC3282
VQFN (48)
7.00 mm × 7.00 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
DACCLKP
LVPECL
DACCLKN
DATACLKP ^LVDS
DATACLKN
D7P ^LVDS
D7N
D0P ^LVDS
D0N
FRAMEP ^LVDS
FRAMEN
OSTRP
LVPECL
OSTRN
16
16
Frame Strobe
Clock Distribution
FIR4
x
sin(x)
5 taps
x
sin(x)
FIR0
x2
59 taps
x2
Control Interface
1.2 V
Reference
A
A
offset
gain
16-b
DAC
EXTIO
BIASJ
IOUTA 1
IOUTA 2
16-b
DAC
B
B
offset
gain
IOUTB1
IOUTB2
Temp
Sensor
AVDD 33
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.