THC63LVD104S Datasheet, PDF (9/12 Pages) THine Electronics, Inc. – 112MHz 30Bits Color LVDS Receiver

THC63LVD104S Rev.1.0
AC Timing Diagrams (Continued)
RCLK+
(Differential)
V_diff = 0V
t_RCIP
V_diff = 0V
RA+/-
RA3’ RA2’ RA1’ RA0’ RA6 RA5 RA4 RA3 RA2 RA1 RA0 RA6’’
RB+/-
RB3’ RB2’ RB1’ RB0’ RB6 RB5 RB4 RB3 RB2 RB1 RB0 RB6’’
RC+/-
RC3’ RC2’ RC1’ RC0’ RC6 RC5 RC4 RC3 RC2 RC1 RC0 RC6’’
RD+/-
RD3’ RD2’ RD1’ RD0’ RD6 RD5 RD4 RD3 RD2 RD1 RD0 RD6’’
RE+/-
RE3’ RE2’ RE1’ RE0’ RE6 RE5 RE4 RE3 RE2 RE1 RE0 RE6’’
Previous Cycle
t_RIP1
t_RIP0
t_RIP6
t_RIP5
t_RIP4
t_RIP3
t_RIP2
Current Cycle
Next Cycle
Fig6. LVDS Input Data Position
RCLK+/-
PD
1.7V
t_RPLL
CLKOUT
Fig7. PLL Lock Loop Set Time
Copyright 2004 THine Electronics, Inc. All rights reserved
9
V_CC/2
THine Electronics, Inc.