THC63LVD1027 Datasheet, PDF(13/22 Page) THine Electronics, Inc.

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THC63LVD1027 Datasheet, PDF (13/22 Pages) THine Electronics, Inc. – 85MHz 10Bits Dual LVDS Repeater

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THC63LVD1027_Rev.2.0_E

LVDS Transmitter AC Characteristics

Symbol

tTCP

tTCH

tTCL

tTSUP

tTHLD

tTOP6

tTOP5

tTOP4

tTOP3

tTOP2

tTOP1

tTOP0

tLVT

Parameter

Conditions

LVDS Clock Period

LVDS Clock High duration

LVDS Clock Low duration

LVDS data output setup

CLKOUT=75MHz

LVDS data output hold

CLKOUT=75MHz

LVDS data output position 6

LVDS data output position 5

LVDS data output position 4

LVDS data output position 3

LVDS data output position 2

LVDS data output position 1

LVDS data output position 0

LVDS Transition Time (Fig7)

Min

11.76

2/7tTCP - tTHLD

3/7tTCP - tTHLD

4/7tTCP - tTHLD

5/7tTCP - tTHLD

6/7tTCP - tTHLD

7/7tTCP - tTHLD

8/7tTCP - tTHLD

Typ

4/7 tTCP

3/7 tTCP

2/7 tTCP

3/7 tTCP

4/7 tTCP

5/7 tTCP

6/7 tTCP

7/7 tTCP

8/7 tTCP

0.6

Max

250

2/7tTCP + tTSUP

3/7tTCP + tTSUP

4/7tTCP + tTSUP

5/7tTCP + tTSUP

6/7tTCP + tTSUP

7/7tTCP + tTSUP

8/7tTCP + tTSUP

1.5

Unit

LVDS Transmitter Output Timing

Tyx+/-

tTOP0

tTOP1

tTOP2

tTOP3

tTOP4

tTOP5

tTOP6

D<6> D<5> D<4>

D<3>

D<2>

Dâ<1> Dâ<0>

tTCP

tTCH

tTCL

TCLKx+

TCLKx-

x=1,2

y= A, B, C, D, E

Ty1+/- output timing is the one between TCLK1+/- and Ty1+/-.

Ty2+/- output timing is the one between TCLK2+/- and Ty2+/-.

80%

Vdifft

20%

80% Note:

1) Vdifft = (Tyx+) - (Tyx-)

20%

x= A, B, C, CLK, D, E

y=1,2

tLVT

Fig7. LVDS Transition Time

13/22

THine Electronics,Inc.

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