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THC63LVD1027 Datasheet, PDF (11/22 Pages) THine Electronics, Inc. – 85MHz 10Bits Dual LVDS Repeater
THC63LVD1027_Rev.2.0_E
LVDS Receiver AC Characteristics
Symbol
tRCP
tRCH
tRCL
tRSUP
tRHLD
tRIP6
tRIP5
tRIP4
tRIP3
tRIP2
tRIP1
tRIP0
tCK12
Parameter
Conditions
LVDS Clock Period
—
LVDS Clock High duration
—
LVDS Clock Low duration
—
LVDS data input setup margin CLKIN=75MHz
LVDS data input hold margin CLKIN=75MHz
LVDS data input position 6
—
LVDS data input position 5
—
LVDS data input position 4
—
LVDS data input position 3
—
LVDS data input position 2
—
LVDS data input position 1
—
LVDS data input position 0
—
Skew Time between RCLK1
and RCLK2 (Fig.6)
—
Min
11.76
2/7 tRCP
2/7 tRCP
480
480
2/7tRCP - tRHLD
3/7tRCP - tRHLD
4/7tRCP - tRHLD
5/7tRCP - tRHLD
6/7tRCP - tRHLD
7/7tRCP - tRHLD
8/7tRCP - tRHLD
-0.3 tRCP
Typ
—
4/7 tRCP
3/7 tRCP
—
—
2/7 tRCP
3/7 tRCP
4/7 tRCP
5/7 tRCP
6/7 tRCP
7/7 tRCP
8/7 tRCP
—
Max
50
5/7 tRCP
5/7 tRCP
—
—
2/7tRCP + tRSUP
3/7tRCP + tRSUP
4/7tRCP + tRSUP
5/7tRCP + tRSUP
6/7tRCP + tRSUP
7/7tRCP + tRSUP
8/7tRCP + tRSUP
Unit
ns
ps
ps
0.3 tRCP
ps
LVDS Receiver Input Timing
Ryx+/-
tRIP0
tRIP1
tRIP2
tRIP3
tRIP4
tRIP5
tRIP6
D<6> D<5> D<4> D<3> D<2> D’<1> D’<0>
tRCP
RCLKx+
RCLKx-
x=1,2
y= A, B, C, D, E
tRCH
tRCL
Ry1+/- skew margin is the one between RCLK1+/- and Ry1+/-.
Ry2+/- skew margin is the one between RCLK2+/- and Ry2+/-.
Copyright©2010 THine Electronics, Inc.
11/22
THine Electronics,Inc.