U3550BM Datasheet, PDF (7/25 Pages) TEMIC Semiconductors – Low-Power FM Transmitter / Synthesizer System 26 to 50 MHz

U3550BM
Content of Internal Registers
The registers have the following structure
D7
D6
D5
D4
D3
D2
D1
D0
R0 – R4: reserved for U3500BM
R5: Gain VCO2
free
free
KV23
KV22
KV21
M12
KV2[3:1]: Gain VCO2
M12: Frequency of phase-comparator in Mixer loop
reserved U3500
R6: Country setting bits
ETXO
M1CP
UDM1
IMIXI
GMOD1 GMOD0
free
free
ETXO: Enable HF-transmit output
M1CP: Changes 1 dB compression point of Mixer 1
UDM1: Up-/down-mixing of Mixer 1
IMIXI: Inverse inputs of phase comparator in mixer loop
GMOD[1:0]: Modulation gain of VCO1
R7: VCO1 setting
AMOD2 AMOD1
RA11
RA10
DV1I3
AMOD[2:1]: Lengthening anti-backlash signal modulator loop
RA1[1:0]: Rough adjustment VCO1
DVlI[3:0]: Divider setting VCO1 integer part
DV1I2
DVlI1
DVlI0
R8: Divider VCO1 fractional part
DV1F7
DV1F6
DV1F5
DV1F4
DV1F [7:0]: Divider setting VCO1 fractional part
DV1F3
DV1F2
DVlF1
DVlF0
R9: Divider VCO3 integer part LSB
DV3I7
DV3I6
DV3I5
DV3I4
DV3I [7:0]: Divider setting VCO3 integer part LSB
DV3I3
DV3I2
DV3I1
DV3I0
R10: Divider VCO3 integer part MSB
free
DV3I14
DV3I13
DV3I12
DV3I[14:8]: Divider setting VCO3 integer part MSB
DV3I11
DV3I10
DV3I9
DV3I8
Rev. A2, 10-Sep-98
7 (25)
Preliminary Information