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U3550BM Datasheet, PDF (3/25 Pages) TEMIC Semiconductors – Low-Power FM Transmitter / Synthesizer System 26 to 50 MHz
U3550BM
VCO Adjustments
To be able to use a wide VCO frequency range
(i.e., VCO2 = 26.3 to 49.9 MHz), VCO1 and VCO2 have
a rough adjust and a fine adjust to increase the frequency
range given by the phase comparator.
The 4 rough adjusts for VCO1 and VCO2 (3 used in
VCO1) are correlated to the country setting. For each
country, there are two sets of VCO rough adjust settings,
one for the base and one for the handset (see tables
Channel Frequencies, Dividers and Country Settings).
To achieve the adaption to the various country standards,
there is a fine adjust with 32 steps for VCO1 and VCO2.
These fine adjusts can be set manually (for test purposes)
or by the automatically mode. Theoretically, the indicator
of the change (increase/ decrease when the voltage of the
phase comparator is too high) is selectable. The program-
ming value ‘1’, however, is necessary.
Setting normal conditions VCO1:
EAFA1 = 1, automatic fine adjust VCO1 enabled
SAFA1 = 1, sign of auto fine adjustment VCO1 = 1.
Setting for VCO2 is identical.
For VCO3, there is no internal adjustment.
Speed-up of the Modulator Loop Filter
To obtain a fast locking time for the modulator loop, there
is a precharge and a speed-up mode for the external loop
filter.
During receive mode (VCO3 enabled, VCO1 disabled),
the modulator loop filter is precharged to 1.25 V.
During the first 30 ms after enabling VCO1, the modu-
lator phase comparator is in speed-up mode. In this mode,
the current of the phase comparator which charges the
loop filter is much larger than in normal mode. The
duration of the speed-up mode depends on the number of
oscillator clock cycles.
Duration Adjustment of the
Anti-Backlash Signals
The phase comparators of the modulator- and the mixer-
loop have a 2-bit adjustment for the duration of the up-
and down pulses when the loop is locked (anti-backlash).
Best results can be achieved by setting all the bits
(AMOD[2:1], AMIX[2:1]) to 0.
Adjustment of the Modulator Gain
To fulfill all requirements of the various countries, three
conversion gains of the modulator are selectable by the
bits GMOD[1:0].
For country settings, see tables Channel Frequencies,
Dividers and Country Settings. For the ranges, see tabel
Electrical Characteristics (RF transmitter).
Clock-Output Divider Adjustment
The MCKO pin is a clock output derived from the crystal
oscillator. It can be used to drive a microprocessor or
other remote components and thereby reduces the number
of crystals required.
The crystal oscillator frequency can be divided by an
integer value: 1, 2, 3, 4, 6 or switched off.
The divider value is adjusted by an analog level on the
MCKA pin.
Table 1 shows the clock-output value on MCKO for
different divider values and the corresponding level
required on MCKA.
Crystal oscillator = 11.15 MHz.
Table 1. Clock-output values
Level on MCKA
Level on MCKA
for VCC = 3.6 V
Corresponding
divider
Corresponding
clock on MCKO
(MHz)
0 to 7% VCC 13% to 27% VCC 33% to 47% VCC 53% to 67% VCC 73% to 87% VCC
0 to 0.25
0.47 to 0.97
1.19 to 1.69
1.91 to 2.41
2.63 to 3.13
X
6
4
3
2
No output
1.858
2.7875
3.716
5.575
93% to VCC
3.35 to 3.6
1
11.15
Rev. A2, 10-Sep-98
3 (25)
Preliminary Information