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DG418 Datasheet, PDF (7/10 Pages) TEMIC Semiconductors – Precision CMOS Analog Switches
DG417/418/419
Test Circuits
VO is the steady state output with the switch on.
+5 V
+15 V
"10 V
VL
S
IN
GND
V+
D
VO
RL
CL
V–
300 W 35 pF
–15 V
Logic
3V
Input
0V
Switch
VS
Input
Switch
0V
Output
50%
VO
90%
tON
tr <20 ns
tf <20 ns
tOFF
CL (includes fixture and stray capacitance)
VO = VS
RL
RL + rDS(on)
Note: Logic input waveform is inverted for switches that have
the opposite logic sense.
Figure 2. Switching Time (DG417/418)
+5 V
VL
S1
VS1
S2
VS2
IN
GND
+15 V
V+
D
Logic 3 V
Input
0V
VO
RL
CL
VS1 = VS2
300 W 35 pF
VO
90%
V–
Switch 0 V
Output
tD
–15 V
CL (includes fixture and stray capacitance)
Figure 3. Break-Before-Make (DG419)
tr <20 ns
tf <20 ns
tD
+5 V
+15 V
VL
VS1
S1
VS2
S2
IN
GND
V+
Logic 3 V
D
Input
VO
0V
RL
300 W
CL
35 pF
VS1
V01
V–
Switch
Output
–15 V
VS2
CL (includes fixture and stray capacitance)
VO = VS
RL
RL + rDS(on)
Figure 4. Transition Time (DG419)
50%
tTRANS
V02
tr <20 ns
tf <20 ns
tTRANS
90%
10%
Siliconix
7
S-52880—Rev. D, 28-Apr-97