U2784B Datasheet, PDF (5/11 Pages) TEMIC Semiconductors – 2200 MHz / 200 MHz Twin PLL

U2784B
Serial Programming Bus
Control Bits:
P0 ... P4: o.c. output ports (1 = high impedance)
LPA, LPB:
selection of P2 output or locksignal
LPA LPB function of pin 10
0 0 o.c. output P2
0 1 locksignal of synthesizer 2
1 0 locksignal of synthesizer 1
1 1 wiredor locksignal of both synthesizer
H1P, H2P: selection of P1/4 output or hardware power down input of synthesizer 1/2 (0 = Port / 1 = HPD)
5IP: selection of P0 output or high current switching input for the charge pump current of synthesizer 1
(0 = Port / 1 = charge pump 1 current switch input)
PS1, PS2: phase selection of synthesizer 1 and synthesizer 2 (1 = normal / 0 = invers)
f_R > f_P
f_R < f_P
f_R = f_P
PS-PLL1/2 = 1
CP1/2
I_sink
I_source
0
RF/2: divide by 2 prescaler for reference divider (0 = off / 1 = on)
PS-PLL1/2 = 0
CP1/2
I_source
I_sink
0
SPD1, SPD2: software power down bit of synthesizer 1/2 (0 = powerdown / 1 = powerup)
5I:
software switch for the charge pump current of synthesizer 1 (0 = low current / 1 = high current)
TRI1, TRI2: enables tristate for the charge pump of synthesizer 1/2 (0 = normal / 1 = tristate)
TEST: enables counter testmode (0 = disabled / 1 = enabled)
TEST
LPA
LPB
PS1
PS2
Testsignal at pin 10
1
1
0
1
x
RFD1
1
1
0
0
x
PGD1
1
0
1
x
1
RFD2
1
0
1
x
0
PGD2
To operate the software power down mode the following condition must be set: HXP = 0; power up and power down
will be set by SPDX = 1 (on) and SPDX = 0 (off).
To operate the hardware power down mode the following condition must be set: HXP = 1; SPDX = 1; power up and
power down will be set by high and low state at the hardware power down pins 9/14.
High current of charge pump synthesizer 1 is active when 5I = 1 and if 5IP = 1 the charge pump current control input
pin 1 is in high state.
TELEFUNKEN Semiconductors
Rev. A2, 29-Jul-96
5 (11)