U4091BM Datasheet, PDF (25/29 Pages) TEMIC Semiconductors – Programmable Telephone Audio Processor

U4091BM
Electrical Characteristics (continued)
Parameters
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _Threshold
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{Adjustment steps}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ threshold
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^{Input impedance}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^{Z-diode voltage}
Test Conditions / Pins
V_RING: high to low
low to high,
RINGTH [0:3] = 0
low to high
RINGTH [0:3] = 15
DRINGTH = 1
V_RING = 30 V
I_RING = 15 mA
Symbol Min. Typ. Max.
4.5
6.3
7
7.7
20
22
24
0.8
1
1.2
4
5
6
V_RINGmax 30.8
Unit Fig.
V
V
V
V
kΩ
V
Serial bus SCL, SDA, AS, VMP = 3.3 V, RSDA = RSCL = RINT = 12 kW
Input voltage
HIGH
LOW
SDA, SCL, INT V_iBUS
3.0
0
V_DD
V
1.5
V
Output voltage
SDA
Acknowledge LOW I_SDA = 3 mA
V_O
0.4
V
Clock frequency
Rise time SDA, SCL
SCL
f_SCL
t_r
100
kHz
1
ms
Fall time SDA, SCL
t_f
300
ns
Period of SCL
HIGH
LOW
HIGH
LOW
t_H
4.0
t_L
4.7
ms
ms
Setup time
Start condition
Data
Stop condition
Time space ¹⁾
t_sSTA
4.7
ms
t_sDAT
250
t_sSTOP
4.7
t_wSTA
4.7
ns
ms
ms
Hold time
Start condition
DATA
t_hSTA
4.0
t_hDAT
0
ms
ms
1) _{This is a space of time where the bus must bee from data transmission and before a new transmission can be started}
Bus Timing
SDA
t_wSTA
t_r
t_f
t_hSTA
SCL
P
S t_hSTA t_L
t_hDAT
t_H
t_sSTA
P = Stop, S = Start
t_hDAT
Figure 21. Bus timing diagram
t_{sSTOP P}
95 10122
Rev. A1, 02-Jun-98
Target Specification
25 (29)