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U4091BM Datasheet, PDF (13/29 Pages) TEMIC Semiconductors – Programmable Telephone Audio Processor | |||
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U4091BM
Dial-Tone Detector
D The output of the receive log (LOGR)
The dial-tone detector is a comparator with one side
connected to the speaker amplifier input and the other to
VM with a 35-mV offset (see figure 11). If the circuit is in
â designated I2
D The output of the transmit background-noise monitor
(BNMT) â designated I3
idle mode, and the incoming signal is greater than 35 mV
(25 mVrms), the comparatorâs output will change
disabling the receive idle mode. This circuit prevents the
dial tone (which would be considered as continuous
D The output of the receive background-noise monitor
(BNMR) â designated I4
D The output of the dial-tone detector
noise) from fading away as the circuit would have the The differential output (AFST, AFSR) of the block
tendency to switch to idle mode. By disabling the receive MODECON controls AFSCON. The effect of I1-I4 is as
idle mode, the dial tone remains at the normally expected follows:
full level.
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ Background-Noise Monitors
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ This circuit distinguishes speech (which consists of
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ bursts) from background noise (a relatively constant
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ *signal level). There are two background-noise monitors
one for the receive path and the other for the transmit
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ path. The receive background-noise monitor is operated
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ on by the receive level detector, while the transmit
background noise monitor is operated on by the transmit
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ level detector (see figure 12). They monitor the
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ background noise by storing a DC voltage representative
ÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃÃ of the respective noise levels in capacitors at CBNMR and
Inputs
Output
I1
I2
I3
I4
Mode
T
T
S
X
Transmit
T
R
Y
Y Change mode
R
T
Y
Y Change mode
R
R
X
S
Receive
T
T
N
X
Idle
T
R
N
N
Idle
R
T
N
N
Idle
R
R
X
N
Idle
X = donât care; Y = I3 and I4 are not both noise.
CBNMT. The voltages at these pins have slow rise times
(determined by the internal current source and an exter-
nal C), but fast decay times. If the signal at TLDR (or
TLDT) changes slowly, the voltage at BNMR (or BNMT)
will remain more positive than the voltage at the non-
inverting input of the monitorâs output comparator. When
speech is present, the voltage at the non-inverting input
of the comparator will rise quicker than the voltage at the
inverting input (due to the burst characteristic of speech),
LOGT > CLOGR
LOGT < CLOGR
LOGR < CLOGT
LOGR > CLOGT
BNMT detects speech
BNMT detects noise
BNMR detects speech
BNMR detects noise
I1=T
I1=R
I2=T
I2=R
I3=S
I3=N
I4=S
I4=N
causing its output to change. This output is sensed by the
mode-control block.
4-Point Sensing
Term Definitions
1. âTransmitâ means the transmit attenuator is fully on,
and the receive attenuator is at maximum attenuation.
In 4-point sensing mode, the receive- and the transmit-
sensing path include additional CLOGs (Calculated
Logarithmical amplifier). The block MODECON
compares the detector output signals and decides whether
receive-, transmit- or idle mode has to be activated.
Depending on the mode decision, MODECON generates
a differential voltage to control AFSCON.
The MODECON block has seven inputs:
D The output of the transmit log (LOGT)
the comparison of LOGT, CLOGR
D The output of the receive clog (CLOGR)
â designated I1
2. âReceiveâ means the receive attenuator is fully on, and
the transmit attenuator is at maximum attenuation.
3. In âIdleâ mode, the transmit- and receive attenuator
are at the half of their maximum attenuation.
a) âChange modeâ means both transmit and receive
speech are present in approximately equal levels.
The attenuators are quickly switched (30 ms) to
the opposite mode until one speech level
dominates the other.
b) âIdleâ means speech has ceased in both transmit
and receive paths. The attenuators are then
slowly switched (1.5 seconds) to idle mode.
D The output of the transmit clog (CLOGT)
the comparison of CLOGT, LOGR
4. Switching to the full transmit or receive modes from
idle mode is at the fast rate (30 ms).
Rev. A1, 02-Jun-98
Target Specification
13 (29)
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