DG401 Datasheet, PDF (2/10 Pages) Intersil Corporation – Monolithic CMOS Analog Switches

DG401/403/405
Functional Block Diagrams and Pin Configurations (Cont’d)
DG403
Dual-In-Line and SOIC
D_{1 1}
NC ₂
D_{3 3}
S_{3 4}
S_{4 5}
D_{4 6}
NC ₇
D_{2 8}
16 ^S1
15 ^IN1
14 ^V–
13 ^GND
12 ^VL
11 ^V+
10 ^IN2
9 ^S2
Top View
DG403
LCC
NC D₁ NC S₁ IN₁
Key _{3 2 1 20 19}
D₃ ⁴
S₃ ⁵
NC ⁶
S₄ ⁷
D₄ ⁸
18 _V–
17 _GND
16 _NC
15 _VL
14 _V+
9 10 11 12 13
NC D₂ NC S₂ IN₂
Top View
Two SPDT Switches per Package
Truth Table
Logic
0
SW₁, SW₂
OFF
SW₃, SW₄
ON
1
ON
OFF
Logic “0” v 0.8 V
Logic “1” w 2.4 V
DG405
Dual-In-Line and SOIC
D_{1 1}
NC ₂
D_{3 3}
S_{3 4}
S_{4 5}
D_{4 6}
NC ₇
D_{2 8}
16 ^S1
15 ^IN1
14 ^V–
13 ^GND
12 ^VL
11 ^V+
10 ^IN2
9 ^S2
Top View
Key
D₃ ⁴
S₃ ⁵
NC ⁶
S₄ ⁷
D₄ ⁸
DG405
LCC
NC D₁ NC S₁ IN₁
3 2 1 20 19
18
17
16
15
14
V–
GND
NC
V_L
V+
9 10 11 12 13
NC D₂ NC S₂ IN₂
Top View
Two DPST Switches per Package
Truth Table
Logic
Switch
0
OFF
1
ON
Logic “0” v 0.8 V
Logic “1” w 2.4 V
2
Siliconix
S-53748—Rev. E, 05-Jun-97