U3750BM Datasheet, PDF (18/20 Pages) TEMIC Semiconductors – One Chip Telephone Circuit

U3750BM
TELEFUNKEN Semiconductors
Flash Control
Microphone Inhibition
Detecting a “R” code produces either a short timed line
break (< 200 ms ) or long timed line break (>200 ms) at
the OL output.
For the duration of the flash, it is not possible to take
information from the keyboard.
Flash signifies that the circuit executes a particular work
as a dialing, a redial, or a pause function, and the code “R”
is lost and not used.
The flash pulse resets the read address counter and does
not erase the data storage, so later redial is possible.
The flash duration is programmed by the FLASH pin
(Pin 3) and depends on the selection of the tri-state-level
pin (Pin 4).
Mutes (transmission mute and dialing mute) become
active high from the beginning of the line break. Timings
explains this.
According to these timings and what has previously been
said, a second pulse flash could only follow the first one
810 ms or 850 ms later.
Consequently the “R” entry remains inhibited during a
time less than 1 second.
Pause Function
A pause separates the dial sequence. It is used for waiting
for a dial tone.
A pause code takes one position in the RAM like a digit.
However, if the circuit executes a pause and if another
pause code is entered, the storage of the second one does
not occur. Furthermore, the pause running is aborted.
Duration of the pause is given in electrical characteristics
for the following configuration: digit, pause, digit, and
consequently takes into account the interdigit.
Particular Functions
After the reset, the particular functions are cleared. The
state of the circuit is no confidence tone, no microphone
inhibition.
Confidence Tone Output
When the data entries are derived from the serial bus, a
pulse frequency modulation corresponding to a 440 Hz
sine wave can be generated on the output MF by transmit-
ting the confidence tone code which is 20 (in decimal).
The function confidence tone is a flip-flop function.
Like the confidence tone, it is a flip flop function acti-
vated through the serial bus by the code 21 (in decimal).
RAM
Organization
The RAM is 32 words of 5 bits and is organized in two
parts: one for the data storage and the other for the
working RAM.
Safeguard
The safeguard is guaranteed by an external capacitor. If
V_RAM decreases under the data retention supply voltage,
the redial function is forbidden. After the reset of the
circuit, a test is executed on V_RAM in order to ensure the
redial validity.
Data storage
Storage, overflow and erasing are realized through three
address counters. The written address counter (P1) points
out the location where the code will be stored. At each
storage, P1 is incremented by one. As each code is
recalled from the RAM for line dialing, the read address
counter (M1) is incremented by one to select the RAM
location of the next code to be recalled.
Consequently, the difference between the contents of P1
and of M1 represents the number of codes that have been
written into the RAM but not yet converted into line
dialing.
The third counter (P2) gives the real capacity of the redial
register.
Redial features
Capacity
If more than 23 codes are entered into the RAM memory,
overflow results and the excess codes replace the data in
the lower numbered RAM locations. In this event, auto-
matic redial is no longer possible.
Storage
Storage pertains to the dialing codes 0 to 9, *, #, pause,
A, B, C and D. It is independent of the dialing mode (pulse
dialing or DTMF dialing).The storage generally contains
the last digits transmitted.
Use of redial
The use of redial is always possible except if the content
of the RAM is empty (P2 = 0). This happens when the
RAM supply is not high enough , when an overflow
occurred, or when previously an erroneous use of the
redial occurred (start of manual dialing not equal to the
content of the RAM).
18 (20)
Rev. A1: 16.07.1996