U4084B Datasheet, PDF (14/26 Pages) TEMIC Semiconductors – Low-Voltage, Voice-Switched Circuit for Hands-Free Operation

U4084B
When activated, the muting function (Pin 9) reduces the
W ^{gain of the amplifier to approximately – 39 dB (with RMI}
= 5.1 k ) by shorting the output to the inverting input (see
figure 7). The mute input has a threshold of
approximately 1.5 V, and the voltage at this pin must be
kept within the range of ground and V_S (see figure 15). If
the mute function is not used, the pin should be grounded.
Power Supply, V_B, and Chip Disable
The power supply voltage at Pin 4 (V_S) is between 3.5 and
6.5 V for normal operation. Reduced operation at 2.8 V
is, however, also possible (see figure 13 and the AGC
section). The power supply current is shown in figure 16
for both operations, power-up and power-down mode.
The output voltage at V_B (Pin 12) is approximately
(V_S–0.7)/2. and provides the AC ground for the system.
W The output impedance at V_B is approximately 400 (see
* figure 17), and forms together with the external capaci-
* tor at V_B a low-pass filter for power supply rejection.
Figure 18 indicates the amount of rejection for different
capacitors. The capacitor values depend on whether the
circuit is powered by the telephone line or a power supply.
Since V_B biases the microphone amplifier, the amount of
supply rejection at its output is directly related to the
rejection at V_B, as well as its gain. Figure 19 depicts this
graphically.
The chip disable (Pin 3) permits powering down the IC to
conserve power and/or for muting purposes. With CD
< 0.8 V, normal operation is in effect.
With CD > 2.0 V and < V_S, the IC is powered down. In
the power-down mode, the microphone amplifier is
disabled, and its output goes to a high impedance state.
Additionally, the bias is removed from the level detectors.
The bias is not removed from the attenuators (Pins 5, 6,
18 and 19), or from Pins 10, 11 and 12 (the attenuators are
disabled, however, and will not pass a signal). The input
W impedance at CD is typically 90 k and has a threshold
of approximately 1.5 V. The voltage at this pin must be
kept within the range of ground and V_S (see figure 15). If
CD is not used, the pin should be grounded.
10
0
– 10
T attenuator
– 20
R attenuator
– 30
– 40
– 50
– 320 – 160
0
160
320
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V_CT – V_B (mV)
Figure 8. Attenuator gain versus VCT (Pin 11)
500
400
300
200
100
0
0 – 20 – 40 – 60 – 80 – 100
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I_I (mA)
Figure 9. Level-detector DC transfer characteristics
300 _{R = 5.1 kW}
250
C = 0.1 mF
↓
200
← _{R = 10 kW}
C = 0.047 mF or 0.1 mF
150
f = 1 kHz
100
50
0
0
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20
4
60
80
100
V_i (mVrms)
Figure 10. Level-detector AC transfer characteristics
14 (26)
TELEFUNKEN Semiconductors
Preliminary Information
Rev. A1, 31-Jan-97