U4084B Datasheet, PDF (11/26 Pages) TEMIC Semiconductors – Low-Voltage, Voice-Switched Circuit for Hands-Free Operation

U4084B
The 36-mV offset at the comparator’s input keeps the
comparator from changing state unless the speech level
exceeds the background noise by approximately 4.0 dB.
The time constant of the external RC (approximately
4.5 s) determines the response time to background-noise
variations.
Volume Control
The volume control input at VCI (Pin 10) is sensed as a
voltage w.r.t. V_B. It affects the attenuators only in receive
mode and has no effect in the idle or transmit modes.
In receive mode, the receive attenuator gain, G_R, is
6.0 dB, and the transmit attenuator gain, G_T, is –46 dB
under the condition that VCI = V_B. When VCI < V_B, the
receive attenuator gain is reduced (figure 10), whereas the
transmit attenuator gain is increased. Their sum,
however, remains constant. A voltage deviation at VCI
changes the voltage at C_T, which in turn controls the
attenuators (see “Attenuator Control Block”).
The volume control setting does not affect the maximum
attenuator input signal at which noticeable distortion
occurs.
The bias current at VCI is typically –60 nA. It does not
vary significantly with the VCI voltage or supply voltage
V_S.
Dial-Tone Detector
The dial-tone detector is a comparator with one side
connected to the receive input (RI) and the other to V_B
with a 15-mV offset (see figure 5). If the circuit is in idle
mode, and the incoming signal is greater than 15 mV (10
mV_rms), the comparator’s output will change, disabling
the receive idle mode. The receive attenuator will then be
at a setting determined mainly by the volume control.
This circuit prevents the dial tone (which would be
considered as continuous noise) from fading away as the
circuit would have the tendency to switch to the idle
mode. By disabling receive idle mode, the dial tone
remains at the normally expected full level.
RI
to R attenuator
18
C4
to attenuator
control
V_B
12674
Figure 5. Dial-tone detector
AGC
The AGC circuit affects the circuit only in receive mode,
and only when the supply voltage is less than 3.5 V. As V_S
< 3.5 V, the gain of the receive attenuator is reduced (see
figure 13). The transmit path attenuation changes such
that the sum of the transmit and receive gains remains
constant.
The purpose of this feature is to reduce the power (and the
current) used by the speaker when a line-powered
speakerphone is connected to a long line where the
available power is limited. By reducing the speaker
power, the voltage sag at V_S is controlled, preventing
possible erratic operation.
Attenuator Control Block
The attenuator control block has seven inputs:
D The output of the comparator operated by RLO2 and
TLO2 (microphone/speaker side) – designated C1
D The output of the comparator operated by RLO1 and
TLO1 (Tip/Ring side) – designated C2
D The output of the transmit background-noise monitor
– designated C3
D The output of the receive background-noise monitor
– designated C4
D The volume control
D The dial-tone detector
D The AGC circuit
TELEFUNKEN Semiconductors
Rev. A1, 31-Jan-97
Preliminary Information
11 (26)