U4084B Datasheet, PDF (10/26 Pages) TEMIC Semiconductors – Low-Voltage, Voice-Switched Circuit for Hands-Free Operation

U4084B
Level Detectors, Figure 4
There are four level detectors, two on the receive side and
two on the transmit side. As shown in figure 4, the terms
in parentheses form one system, and the other terms form
the second system. Each level detector is a high-gain
amplifier with back-to-back diodes in the feedback path,
resulting in a non-linear gain which permits operation
over a wide dynamic range of speech levels. Refer to
figures 9, 10 and 11 for their AC and DC transfer charac-
teristics. The sensitivity of each level detector is
determined by the external resistor and capacitor at each
input (TLI1, TLI2, RLI1, and RLI2). Each output charges
an external capacitor through a diode and limiting
resistor, thus providing a DC representation of the input
W ^{AC signal level. The outputs have a quick rise time (deter-}
mined by the capacitor and an internal 350- resistor),
and a slow decay time set by an internal current source
" ^{and the capacitor. The capacitors on the four outputs}
should have the same value ( 10%) to prevent timing
problems.
On the receive side, one level detector (RLI1) is at the
receive input receiving the same signal as at tip and ring,
and the other (RLI2) is at the output of the speaker ampli-
fier (see figure 2). On the transmit side, one level detector
(TLI2) is at the output of the microphone amplifier while
the other (TLI1) is at the hybrid output. Outputs RLO1
and TLO1 feed a comparator. The output of this compa-
Level detector
rator goes to the attenuator control block. Likewise,
outputs RLO2 and TLO2 feed a second comparator which
also goes to the attenuator control block. The truth table
for the effects of the level detectors is given in the section
“Attenuator Control Block.
Background-Noise Monitors
The background-noise monitiors distinguish speech
(which consists of bursts) from background noise (a rela-
tively constant signal level). There are two
background-noise monitors – one for the receive path and
the other for the transmit path. Referring to figure 4, the
receive background-noise monitor is operated by the
TLI2–TLO2 level detector.
Background-noise monitoring is carried out by storing a
DC voltage representative of the respective noise levels
in capacitors at CPR and CPT. The voltages at these pins
have slow rise times (determined by the external RC), but
fast decay times. If the signal at RLI1 (or TLI2) changes
slowly, the voltage at CPR (or CPT) will remain being
more positive than the voltage at the non-inverting input
of the monitor’s output comparator. When speech is
present, the voltage on the non-inverting input of the
comparator will rise quicker than the voltage at the
inverting input (due to the burst characteristic of speech),
causing its output to change. This output is sensed by the
attenuator control block”.
Background-noise monitor
V_S
RLI1
(TLI2)
5.1kΩ
23
(14)
–
+
V_B
0.1µF
Signal
input
4µA
350Ω
2µF
22 (15)
RLO1
(TLO2)
+
–
56kΩ
33kΩ
12
V_B
–
+
36 mV
24
100kΩ
(13) _CPR
(CPT)
–
+
47µF
Level detector
C4 (C3)
TLI1
(RLI2)
V_B
+
20
–
(17)
5.1kΩ
4µA
350Ω
2µF
21 (16)
TLO1
(RLO2)
–
C2 (C1)
+
Comparator
to
attenuator
control
block
0.1µF
Signal input
12673
Figure 4. Level detectors
10 (26)
TELEFUNKEN Semiconductors
Preliminary Information
Rev. A1, 31-Jan-97