TC429 Datasheet, PDF (4/7 Pages) TelCom Semiconductor, Inc – 6A SINGLE HIGH-SPEED, CMOS POWER MOSFET DRIVER

6A SINGLE HIGH-SPEED,
CMOS POWER MOSFET DRIVER
TC429
SUPPLY BYPASSING
Charging and discharging large capacitive loads quickly
requires large currents. For example, charging a 2500 pF
load 18V in 25nsec requires a 1.8A current from the device's
power supply.
To guarantee low supply impedance over a wide fre-
quency range, a parallel capacitor combination is recom-
mended for supply bypassing. Low-inductance ceramic
disk capacitors with short lead lengths (<0.5 in.) should be
used. A 1 µF film capacitor in parallel with one or two 0.1 µF
ceramic disk capacitors normally provides adequate by-
passing.
GROUNDING
The high-current capability of the TC429 demands
careful PC board layout for best performance. Since the
TC429 is an inverting driver, any ground lead impedance will
appear as negative feedback which can degrade switching
speed. The feedback is especially noticeable with slow rise-
time inputs, such as those produced by an open-collector
output with resistor pull-up. The TC429 input structure
includes about 300 mV of hysteresis to ensure clean transi-
tions and freedom from oscillation, but attention to layout is
still recommended.
Figure 2 shows the feedback effect in detail. As the
TC429 input begins to go positive, the output goes negative
and several amperes of current flow in the ground lead. As
little as 0.05Ω of PC trace resistance can produce hundreds
of millivolts at the TC429 ground pins. If the driving logic is
referenced to power ground, the effective logic input level is
reduced and oscillations may result.
+18V
TC429
2.4V
0V
2
0.1 µF
1 µF
18V
1
TEK CURRENT
8 _6,7 ^{PROBE 6302}
0V
5
4
0.1 µF
2500 pF
LOGIC
GROUND
300 mV
POWER
GROUND
6A
PC TRACE RESISTANCE = 0.05Ω
Figure 2. Switching Time Degradation Due to Negative Feedback
4-178
To ensure optimum device performance, separate
ground traces should be provided for the logic and power
connections. Connecting logic ground directly to the TC429
GND pins ensures full logic drive to the input and fast output
switching. Both GND pins should be connected to power
ground.
INPUT STAGE
The input voltage level changes the no-load or quies-
cent supply current. The N-channel MOSFET input stage
transistor drives a 3 mA current source load. With a logic "1"
input, the maximum quiescent supply current is 5 mA. Logic
"0" input level signals reduce quiescent current to 500 µA
maximum.
The TC429 input is designed to provide 300 mV of
hysteresis, providing clean transitions and minimizing out-
put stage current spiking when changing states. Input volt-
age levels are approximately 1.5V, making the device TTL
compatible over the 7V to 18V operating supply range. Input
current is less than 10µA over this range.
The TC429 can be directly driven by TL494, SG1526/
1527, SG1524, SE5560 or similar switch-mode power sup-
ply integrated circuits. By off-loading the power-driving
duties to the TC429, the power supply controller can operate
at lower dissipation, improving performance and reliability.
POWER DISSIPATION
CMOS circuits usually permit the user to ignore power
dissipation. Logic families such as the 4000 and 74C have
outputs that can only supply a few milliamperes of current,
and even shorting outputs to ground will not force enough
current to destroy the device. The TC429, however, can
source or sink several amperes and drive large capacitive
loads at high frequency. The package power dissipation limit
can easily be exceeded. Therefore, some attention should
be given to power dissipation when driving low impedance
loads and/or operating at high frequency.
The supply current versus frequency and supply cur-
rent versus capacitive load characteristic curves will aid in
determining power dissipation calculations. Table I lists the
maximum operating frequency for several power supply
voltages when driving a 2500pF load. More accurate power
dissipation figures can be obtained by summing the three
power sources.
Input signal duty cycle, power supply voltage, and
capacitive load influence package power dissipation. Given
power dissipation and package thermal resistance, the
maximum ambient operation temperature is easily calcu-
lated. The 8-pin CerDIP junction-to-ambient thermal resis-
tance is 150°C/W. At +25°C, the package is rated at 800 mW
maximum dissipation. Maximum allowable chip tempera-
ture is +150°C.
TELCOM SEMICONDUCTOR, INC.